Semiconductor device
Provided is a semiconductor device including first and second semiconductor pillars formed on a surface of a semiconductor substrate and aligning in a first direction; a first interconnect extending in a second direction intersecting with the first direction and provided between the first and second semiconductor pillars; and a first contact pad located over the first interconnect, the first contact pad being in contact with and electrically connected to the first semiconductor pillar at a side surface thereof, while being electrically isolated from the second semiconductor pillar.
1. A semiconductor device comprising:
a semiconductor substrate;
a semiconductor pillar formed on a surface of the semiconductor substrate, an upper portion of the semiconductor pillar comprising an epitaxially grown silicon layer, the epitaxial silicon layer having at least a portion which extends sideward to form an overhang;
a gate electrode embedded in a first trench adjacent to the semiconductor pillar and formed on a side surface of the semiconductor pillar and extending as a line;
a storage element formed on the epitaxial silicon layer; and
a source/drain region embedded at a location lower than the gate electrode and being elongated so as to form a line shape, wherein the source/drain region is formed only on one side of the semiconductor pillar.
2. The semiconductor device according to claim 1 , further comprising:
a second trench formed on a surface of a semiconductor substrate; and
a first interconnect embedded in a lower portion of the second trench and in contact with the source/drain region.
3. A semiconductor device comprising:
a semiconductor substrate;
a semiconductor pillar formed on a surface of the semiconductor substrate;
a source/drain region in an upper portion of the semiconductor pillar;
a gate electrode embedded in a lower portion of a trench and formed on a side surface of the semiconductor pillar and extending as a word line, the trench being adjacent to the semiconductor pillar;
a dielectric capping layer formed in an upper portion of the trench and on a top surface of the gate electrode;
an epitaxial silicon layer grown at an upper portion of the semiconductor pillar, the epitaxial silicon layer having at least a portion grown sideward from the semiconductor pillar to partially overhang the dielectric capping layer and the gate electrode; and
a capacitor for data storage.
4. The semiconductor device according to claim 3 , wherein the dielectric capping layer comprises silicon nitride.
5. The semiconductor device according to claim 3 , wherein the capacitor has a lower electrode formed on the epitaxial silicon layer.
6. The semiconductor device according to claim 3 , wherein the dielectric capping layer comprises at least a first dielectric film and a second dielectric film.
7. The semiconductor device according to claim 6 , wherein the first dielectric film conformally covers a top surface of the gate electrode and a side surface of the semiconductor pillar, and the second dielectric film fills the remaining space of the trench.