Absolute value current-sensing circuit for step-down DC-to-DC converters with integrated power stage

1. A system for measuring an output current Î OUT of a DC-to-DC converter, the DC-to-DC converter comprising a transistor power stage, the system comprising:

a voltage measuring circuit, connected to an output of the transistor power stage of the DC-to-DC converter, the voltage measuring circuit measuring an average voltage drop V′ AVG on impedances R DS (P,N) of transistors of the transistor power stage; and

an impedance R Composite , connected to an output of the voltage measuring circuit providing a current I′ OUT , the impedance R Composite reproducing the impedances R DS (P,N) of the transistors of the transistor power stage and being traversed by the current I′ OUT such that Î OUT =V AVG /(G·k·R Composite )=I′ OUT /(G·k), wherein k is a scaling ratio and G is a voltage gain that amplifies the voltage V′ AVG to V AVG , and further wherein the impedance R Composite comprises an N-MOS transistor and a P-MOS transistor that are connected in parallel, the N-MOS transistor and the P-MOS transistor operating in ohmic area, being simultaneously switched with the transistors of the transistor power stage and driven by control signals of the transistors of the transistor power stage.

2. The system of claim 1 , wherein the impedance R Composite comprises:

at least another N-MOS transistor connected in series with the N-MOS transistor, the N-MOS transistors sharing an N-MOS drain and an N-MOS source; and

at least another P-MOS transistor connected in series with the N-MOS transistor, the P-MOS transistors sharing a P-MOS drain and a P-MOS source.

3. The system of claim 1 , further comprising a voltage inverter providing, to a gate of the P-MOS transistor of the impedance R Composite , a negative voltage of control signal driven P-MOS transistor of the transistor power stage of the DC-to-DC converter.

4. The system of claim 3 , wherein the voltage inverter comprises:

a first P-MOS transistor Q 4 with its source connected to a positive supply voltage V DD and its drain connected to a drain of a first N-MOS transistor Q 5 , the first N-MOS transistor Q 5 having its source connected to a ground;

a second P-MOS transistor Q 6 with its source connected to the positive supply voltage V DD and its drain connected to a drain of a second N-MOS transistor Q 7 and to a gate of a third N-MOS transistor Q 8 , a gate of the second N-MOS transistor Q 7 and a source of the third N-MOS transistor Q 8 being connected to the ground;

a capacitor connected, on a first end that is an output of the voltage inverter, to a drain of the third N-MOS transistor Q 8 and to a source of second N-MOS transistor Q 7 , and connected, on a second end, to the drain of the first P-MOS transistor Q 4 and to the source of the first N-MOS transistor Q 5 ; and

an inverter connected, on an input, to a line providing the control signal driven P-MOS transistor of the transistor power stage, and connected, on an output, to the gates of the first and second P-MOS transistors Q 4 , Q 6 and the gate of the first N-MOS transistor Q 5 .

5. The system of claim 1 , wherein the voltage measuring circuit comprises:

an auxiliary power stage that is identical to the transistor power stage of the DC-to-DC converter, similarly powered and driven, the auxiliary power stage being not traversed by the output current of the DC-to-DC converter; and

a differential amplifier having an output voltage V AUX as a V + input provided by the auxiliary power stage and having an output voltage V LX as a V − input provided by the transistor power stage, the differential amplifier producing an output voltage V AVG that is the amplified average voltage drop V′ AVG .

6. The system of claim 5 , wherein the voltage measuring circuit further comprises:

a first low-pass filter providing to the V + input of the differential amplifier an average value of the output voltage V AUX ; and

a second low-pass filter providing to the V − input of the differential amplifier an average value of the output voltage V LX .

7. The system of claim 6 , wherein the first low-pass filter and the second low-pass filter are:

an RC filter of the first order; and/or

an RC filter of the second order.

8. The system of claim 6 , wherein the voltage measuring circuit further comprises:

at least one first resistor between the input V + of the differential amplifier and the first low-pass filter; and

at least one second resistor between the input V − of the differential amplifier and the second low-pass filter.

9. The system of claim 5 , wherein the voltage measuring circuit further comprises:

an RC filter R 2 C 2 connected to the input V + of the differential amplifier and an output of the differential amplifier;

an RC filter R 2 C 2 to the input V − of the differential amplifier and the ground; and

a capacitor C 3 connected to the output of the differential amplifier and the ground.

10. The system of claim 5 , wherein the voltage measuring circuit further comprises:

a first disconnection circuit for disconnecting the V + input from the auxiliary power stage; and

a second disconnection circuit for disconnecting the V − input from the transistor power stage during body-diode conduction intervals of the transistors of the transistor power stage and of transistors of the auxiliary power stage.

11. The system of claim 5 , wherein the differential amplifier comprises a current sensor for sensing the output current I′ OUT at a positive supply rail of the differential amplifier, the current sensor comprising an impedance R sense traversed by the output current I′ OUT of the DC-to-DC converter such that an output voltage V OUT is proportional to the output current I′ OUT .

12. A process for measuring an output current Î OUT of a DC-to-DC converter, the DC-to-DC converter comprising a transistor power stage, the process comprising:

obtaining an average voltage drop V′ AVG on impedances R DS (P,N) of transistors of the transistor power stage;

applying an amplified average voltage drop V AVG =G·V′ AVG on an impedance R Composite that reproduces the impedances R DS (P,N) of the transistors of the transistor power stage;

measuring a current I′ OUT that traverses the impedance R composite ; and

obtaining an output current Î OUT from the measured current I′ OUT the output current Î OUT being defined by Î OUT =V AVG /(G·k·R Composite )=I′ OUT /(G·k) wherein k is a scaling ratio and G is a voltage gain that amplifies the voltage V′ AVG to V AVG , and further wherein the impedance R Composite comprises an N-MOS transistor and a P-MOS transistor that are connected in parallel, the N-MOS transistor and the P-MOS transistor operating in ohmic area, being simultaneously switched with the transistors of the transistor power stage and driven by control signals of the transistors of the transistor power stage.

13. A DC-to-DC converter with a transistor power stage, the DC-to-DC converter comprising an apparatus for measuring an output current Î OUT of a DC-to-DC converter; the apparatus comprising:

a voltage measuring circuit, connected to an output of the transistor power stage of the DC-to-DC converter, the voltage measuring circuit measuring an average voltage drop V′ AVG on impedances R DS (P,N) of transistors of the transistor power stage; and

an impedance R Composite , connected to an output of the voltage measuring circuit providing a current I′ OUT , the impedance R Composite reproducing the impedances R DS (P,N) of the transistors of the transistor power stage and being traversed by the current I′ OUT such that Î OUT =V AVG /(G·k·R Composite )=I′ OUT /(G·k), wherein k is a scaling ratio and G is a voltage gain that amplifies the voltage V′ AVG to V AVG , and further wherein the impedance R Composite comprises an N-MOS transistor and a P-MOS transistor that are connected in parallel, the N-MOS transistor and the P-MOS transistor operating in ohmic area, being simultaneously switched with the transistors of the transistor power stage and driven by control signals of the transistors of the transistor power stage.

14. The DC-to-DC converter of claim 13 , wherein the DC-to-DC converter including the apparatus is integrated on a single integrated component.