IP Library Patent Application 14720028
Patent Application
App. No. 14/720,028

DATA PROCESSING SYSTEM AND DATA PROCESSOR

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Quick Facts
Patent No.
US None
App. No.
14/720,028
Abstract

One data processor is provided with an interface for realizing connection with the other data processor. This interface is provided with a function for connecting the other data processor as a bus master to an internal bus of the one data processor, and the relevant other data processor is capable of directly operating peripheral functions that are memory mapped to the internal bus from an external side via the interface. Accordingly, the data processor can utilize the peripheral functions of the other data processor without interruption of the program being executed. In short, one data processor can use in common the peripheral resources of the other data processor.

Claims (19)

1 . A mobile data terminal device comprising:

an antenna;

a single chip baseband processor coupled to the antenna;

a single chip application processor including:

a central processing unit (CPU),

an external interface circuit, and

an internal bus coupled to the CPU and the external interface circuit;

a LCD controller;

a first bus coupled to both the baseband processor and the first external interface circuit of the application processor; and

a second bus coupled to both the first external interface circuit of the application processor and the LCD controller,

wherein the application processor has:

a standby mode in which power is supplied to the external interface circuit and power is not supplied to the CPU, and

an operating mode in which power is supplied to both the external interface circuit and the CPU and the CPU fetches and executes an instruction,

wherein when the application processor is in the operating mode, the baseband processor accesses the application processor through the external interface circuit of the application processor via the first bus and the application processor provides a signal to the second bus through the external interface circuit of the application processor, and

wherein when the application processor is in the standby mode, the baseband processor accesses the LCD controller through the external interface circuit of the application processor.

2 . The mobile data terminal device according to claim 1 ,

wherein when the application processor is in the standby mode, the baseband processor provides time data to the LCD controller via the first bus, the external interface circuit of the application processor and the second bus.

3 . The mobile data terminal device according to claim 2 ,

wherein when the application processor is in the standby mode, the application processor changes its operating mode with an interrupt.