IP Library Granted Patent US 9,466,735
Granted Patent B2
US 9,466,735 · App. 14/731,105 · Granted Oct 11, 2016

Junction barrier schottky diode and method for manufacturing the same

Inventor: Tomoaki Tanaka (Nakano, JP)
Assignee: Synaptics Display Devices GK
H01L29/872H01L29/0619H01L29/0692H01L29/0649
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,466,735
App. No.
14/731,105
Granted
Oct 11, 2016
Kind
B2
Abstract

A junction barrier Schottky diode is formed by shifting second semiconductor regions of a second conductivity type in a staggered shape in a first semiconductor region of a first conductivity type so that pn junction regions are formed at predetermined distances between the second semiconductor regions and the first semiconductor region. A third semiconductor region of the first conductivity type is formed between the second semiconductor regions in order to form a Schottky junction region. An electrode is formed on the second and third semiconductor regions. The second semiconductor regions arranged at equal distances in an X direction are formed in a plurality of columns in a Y direction. An amount of shift between adjacent columns in the X direction is set such that a Y-direct ion distance between the second semiconductor regions in the different columns is larger than an X-direction distance between the second semiconductor regions in each column.

Claims (27)

1. A junction barrier Schottky diode, comprising:

a first semiconductor region of a first conductivity type formed on a semiconductor substrate;

a plurality of second semiconductor regions of a second conductivity type that are formed in a staggered arrangement in the first semiconductor region, pn junction regions being formed at predetermined distances between the plurality of second semiconductor regions and the first semiconductor region;

a third semiconductor region of the first conductivity type that is formed between the second semiconductor regions in order to form a Schottky junction region; and

an electrode formed on the second and third semiconductor regions,

wherein each of the second semiconductor regions has a quadrangular shape in plan view from the electrode,

wherein the staggered arrangement comprises a plurality of staggered rows extending in an X direction and a plurality of overlapping columns extending in a Y direction, wherein the second semiconductor regions within each row of the plurality of staggered rows are arranged with an equal X-direction spacing, and

wherein an amount of shift along the X direction between adjacent columns of the plurality of columns is set such that a Y-direction distance between adjacent second semiconductor regions of the adjacent columns is larger than the X-direction spacing.

2. The junction barrier Schottky diode according to claim 1 , wherein the quadrangular shape of each of the second semiconductor regions is any of a square, a rectangle, and a parallelogram.

3. A junction barrier Schottky diode, comprising:

a first semiconductor region of a first conductivity type formed on a semiconductor substrate;

a plurality of second semiconductor regions of a second conductivity type that are formed in a plurality of rows and columns in the first semiconductor region, pn junction regions being formed at predetermined distances between the plurality of second semiconductor regions and the first semiconductor region;

a third semiconductor region of the first conductivity type that is formed between the second semiconductor regions in order to form a Schottky junction region; and

an electrode formed on the second and third semiconductor regions, wherein

each of the second semiconductor regions has a quadrangular shape having a side extending along a first direction with a length “b” in plan view from the electrode, and

a distance between adjacent second semiconductor regions in along a second direction crossing the first direction is larger than a distance “c”, wherein the distance c is defined between adjacent second semiconductor regions along the first direction, and an amount of shift “d” along the first direction between adjacent second semiconductor regions in adjacent columns satisfies a relationship of (c/2)≦d≦(b+c/2).

4. The junction barrier Schottky diode according to claim 3 , wherein the quadrangular shape of each of the second semiconductor regions is any of a square, a rectangle, and a parallelogram.

5. A junction barrier Schottky diode, comprising:

a first semiconductor region of a first conductivity type formed on a semiconductor substrate;

a plurality of second semiconductor regions of a second conductivity type that are formed in a plurality of rows and columns in the first semiconductor region, pn junction regions being formed at predetermined distances between the plurality of second semiconductor regions and the first semiconductor region;

a third semiconductor region of the first conductivity type that is formed between the second semiconductor regions in order to form a Schottky junction region; and

an electrode formed on the second and third semiconductor regions, wherein

each of the second semiconductor regions has a quadrangular shape having a side extending along a first direction with a length “b” in plan view from the electrode, and

an extendable size of a depletion layer from an edge of each second semiconductor region when a predetermined reverse voltage is applied is represented by a first distance “a” in the plan view, a second distance between adjacent second semiconductor regions along the first direction is (a√2), a distance between adjacent second semiconductor regions in a second direction crossing the first direction is (a+a/√2), and an amount of shift “d” along the first direction between adjacent second semiconductor regions in adjacent columns satisfies a relationship of (a/√2)≦d≦(b+a/√2).

6. The junction barrier Schottky diode according to claim 5 , wherein the quadrangular shape of each of the second semiconductor regions is any of a square, a rectangle, and a parallelogram.

7. The junction barrier Schottky diode according to claim 5 , wherein the amount of shift d between the adjacent second semiconductor regions in adjacent columns is (b/2).

8. The junction barrier Schottky diode according to claim 5 , wherein the predetermined reverse voltage is an allowable reverse voltage.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039710/0331 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2015
From: TANAKA, TOMOAKI
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 035790/0511 →
Priority Claims (1)
JP 2014-130346 · Jun 25, 2014 · national
Continuity (1)
Related Publication 20150380570A1 · Dec 31, 2015