IP Library Granted Patent US 9,935,646
Granted Patent B2
US 9,935,646 · App. 14/802,787 · Granted Apr 3, 2018

Systems and methods for identifying a failure in an analog to digital converter

Inventor: Travis C. Mallett (Pullman, WA)
Assignee: Schweitzer Engineering Laboratories, Inc.
H03M1/1076G06F11/00H03M1/109H03M1/1071H03M3/378H03M3/458
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Quick Facts
Patent No.
US 9,935,646
App. No.
14/802,787
Granted
Apr 3, 2018
Kind
B2
Abstract

The present disclosure provides systems and methods for identifying failures in an analog to digital (A/D) converter. An intelligent electronic device (IED) may monitor a digital output of one or more A/D converters. The IED may determine a slope value limit associated with the A/D converter. The IED may determine an output slope value of the digital output based on a difference of a converter output value measured at a first time and a converter output value measured at a later time. If the determined output slope value exceeds the slope value limit, the IED may identify a failure of the A/D converter. An IED may determine that concurrent failures in multiple, parallel A/D converters are indicative of a problem upstream from the A/D converters.

Claims (42)

1. An intelligent electronic device (IED) configured to identify a failure in an analog to digital (A/D) converter, comprising:

a meter configured to

determine a first voltage of an output of a first A/D converter at a first time, t 1 , and

determine a second voltage of the output of the first A/D converter at a second time, t 2 ;

a slope value limit module configured to identify a slope value limit corresponding to a slope of a step response of a filter associated with the A/D converter;

an output slope value module configured to determine an output slope value corresponding to a slope of the output of the first A/D converter based on a difference, d 1 , of the first voltage at the first time, t 1 , and the second voltage at the second time, t 2 ;

a comparator module configured to determine that the output slope value is greater than the slope value limit; and

an error reporting module configured to report a failure of the A/D converter based on the determination that the output slope value is greater than the slope value limit.

2. The IED of claim 1 , wherein the slope value limit corresponding to the slope of the step response of the filter associated with the A/D converter is a maximum slope value.

3. The IED of claim 1 , wherein the slope value limit corresponding to the slope of the step response of the filter associated with the A/D converter comprises a slope value smaller than a maximum slope value.

4. The IED of claim 1 , wherein the slope value limit corresponds to the slope of an input forcing function of the filter associated with the A/D converter, the input forcing function comprising a first step function at the first time t 1 followed by a second step function of opposite sign at the second time t 2 .

5. The IED of claim 1 , wherein the slope value limit corresponds to a slope of an impulse response of a filter associated with the A/D converter.

6. The IED of claim 1 , wherein the slope value limit corresponds to a slope of a plurality of combined impulse responses of at least one filter associated with the A/D converter.

7. The IED of claim 1 , wherein the filter associated with the A/D converter comprises at least one sinc filter.

8. The IED of claim 1 , wherein the filter associated with the A/D converter comprises at least one digital filter.

9. The IED of claim 1 , wherein the filter associated with the A/D converter comprises at least one analog filter.

10. The IED of claim 1 , wherein the slope of the filter step response is defined by samples at a time interval equal to the difference between first time t 1 and second time t 2 .

11. The IED of claim 1 , wherein the slope of the filter step response of the filter associated with the A/D converter is defined by samples at a time interval larger than the difference between first time t 1 and second time t 2 .

12. The IED of claim 1 , wherein the meter comprises at least one digital measurement device.

13. The IED of claim 1 , wherein the output slope value corresponds to a mathematical combination of multiple consecutive output voltages of the first A/D converter t 1 , t 2 , t 3 up to t n , where n is an arbitrarily large integer.

14. The IED of claim 1 , wherein the output slope value corresponds to a magnitude of a combination of the slope of the output of the first A/D converter based on the difference, d 1 , of the first voltage at the first time, t 1 , and the second voltage at the second time, t 2 , and a second slope of the output of the first A/D converter based on a difference, d 2 , of a third voltage at a third time, t 3 , and a fourth voltage at a fourth time, t 4 .

15. The IED of claim 1 , wherein the A/D comprises a delta-sigma A/D converter.

16. The IED of claim 1 , wherein the A/D converter comprises a successive approximation register A/D converter.

17. A non-transitory computer-readable medium having instructions that, when executed by a processor, cause the processor to perform operations for identifying a failure in an analog to digital (A/D) converter, the operations comprising:

determining a first voltage of an output of a first A/D converter at a first time, t 1 ;

determining a second voltage of the output of the first A/D converter at a second time, t 2 ;

identifying a slope value limit corresponding to a slope of a step response of a filter associated with the A/D converter;

determining an output slope value corresponding to a slope of the output of the first A/D converter based on a difference, d 1 , of the first voltage at the first time, t 1 , and the second voltage at the second time, t 2 ;

determining that the output slope value is greater than the slope value limit; and

reporting a failure of the A/D converter based on the determination that the output slope value is greater than the slope value limit.

18. A method for identifying a failure in an analog to digital (A/D) converter, comprising:

determining a first voltage of an output of a first A/D converter at a first time, t 1 ;

determining a second voltage of the output of the first A/D converter at a second time, t 2 ;

identifying a slope value limit corresponding to a slope of a step response of a filter associated with the A/D converter;

determining an output slope value corresponding to a slope of the output of the first A/D converter based on a difference, d 1 , of the first voltage at the first time, t 1 , and the second voltage at the second time, t 2 ;

determining that the output slope value is greater than the slope value limit; and

reporting, via a communication link, a failure of the A/D converter based on the determination that the output slope value is greater than the slope value limit.

19. The method of claim 18 , wherein the slope value limit corresponding to the slope of the step response of the filter associated with the A/D converter comprises a maximum slope value.

20. The method of claim 18 , wherein the slope of the filter step response is defined by samples at a time interval equal to the difference between first time t 1 and second time t 2 .

21. The method of claim 18 , wherein the slope of the filter step response of the filter associated with the A/D converter is defined by samples at a time interval larger than the difference between first time t 1 and second time t 2 .

22. The method of claim 18 , wherein the output slope value corresponds to a magnitude of a combination of the slope of the output of the first A/D converter based on the difference, d 1 , of the of the first voltage at the first time, t 1 , and the second voltage at the second time, t 2 , and a second slope of the output of the first A/D converter based on a difference, d 2 , of a third voltage at a third time, t 3 , and a fourth voltage at a fourth time, t 4 .

23. The method of claim 18 , wherein the A/D comprises a delta-sigma A/D converter.

Assignments (2)
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Jun 4, 2018
From: SCHWEITZER ENGINEERING LABORATORIES, INC.
To: CITIBANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 047231/0253 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 17, 2015
From: MALLETT, TRAVIS C.
To: SCHWEITZER ENGINEERING LABORATORIES, INC.
Reel/Frame 036119/0419 →
Continuity (1)
Related Publication 20170019120A1 · Jan 19, 2017