IP Library Granted Patent US 10,014,863
Granted Patent B2
US 10,014,863 · App. 14/849,704 · Granted Jul 3, 2018

Device and method for voltage boosting and display panel driver incorporating the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,014,863
App. No.
14/849,704
Granted
Jul 3, 2018
Kind
B2
Abstract

An integrated circuit device boosts an output voltage which is to be boosted based on the reference power supply voltage, based on another power supply voltage before the reference power supply voltage is supplied.

Claims (63)

1. An integrated circuit device comprising:

a voltage boosting circuit configured to operate on a first power supply voltage and boost an output voltage generated on a first node to a first voltage level;

a precharging circuit configured to supply a second power supply voltage to the first node, the second power supply voltage having a second voltage level lower than the first voltage level; and

a control signal generating circuit configured to generate a plurality of control signals, wherein the precharging circuit supplies the second power supply voltage to the first node before the first power supply voltage starts to be supplied to the voltage boosting circuit based on a first control signal of the plurality of control signals, and

wherein the voltage boosting circuit is operational to boost the output voltage, by a switching operation of transistors, to back gates of which the output voltage is supplied.

2. The integrated circuit device according to claim 1 , wherein the precharging circuit comprises a precharge control switch configured to control a connection of the first node and a second node to which the second power supply voltage is supplied, based on the first control signal, and

wherein the precharge control switch connects the first node and the second node before the first power supply voltage is supplied to the voltage boosting circuit.

3. The integrated circuit device according to claim 2 ,

wherein the voltage boosting operation of the output voltage by the voltage boosting circuit is controlled based on a second control signal of the plurality of control signals.

4. The integrated circuit device according to claim 2 , wherein the precharging circuit outputs the first control signal and a second control signal of the plurality of control signals based on a comparison of the output voltage and a voltage supplied to the second node, and

wherein the voltage boosting operation of the output voltage by the voltage boosting circuit is controlled based on the second control signal.

5. The integrated circuit device according to claim 3 , further comprising:

a power supply circuit configured to generate the first power supply voltage to output to the voltage boosting circuit,

wherein a generating operation of the first power supply voltage by the power supply circuit is controlled based on the second control signal.

6. The integrated circuit device according to claim 4 , further comprising:

a power supply circuit configured to generate the first power supply voltage to output to the voltage boosting circuit,

wherein a generating operation of the first power supply voltage by the power supply circuit is controlled based on the second control signal.

7. The integrated circuit device according to claim 2 , wherein the precharging circuit further comprises a CMOS circuit configured to control the supply of the second power supply voltage to the second node.

8. A display panel driver comprising:

an integrated circuit device; and

a gate driving circuit configured to generate a gate line drive signal based on an output voltage, to drive gate lines of a display panel,

wherein the integrated circuit device comprises:

a voltage boosting circuit configured to operate on a first power supply voltage and boost the output voltage generated on a first node to a first voltage level;

a precharging circuit configured to supply a second power supply voltage to the first node, the second power supply voltage having a second voltage level lower than the first voltage level; and

a control signal generating circuit configured to generate a plurality of control signals, wherein the precharging circuit supplies the second power supply voltage to the first node before the first power supply voltage starts to be supplied to the voltage boosting circuit based on a first control signal of the plurality of control signals, and

wherein the voltage boosting circuit is operational to boost the output voltage, by a switching operation of transistors, to back gates of which the output voltage is supplied.

9. The display panel driver according to claim 8 , wherein the precharging circuit comprises:

a precharge control switch configured to control a connection of the first node and a second node to which the second power supply voltage is supplied, based on the first control signal, and

wherein the precharge control switch connects the first node and the second node before the first power supply voltage is supplied to the voltage boosting circuit.

10. The display panel driver according to claim 9 ,

wherein the voltage boosting operation of the output voltage by the voltage boosting circuit is controlled based on a second control signal of the plurality of control signals.

11. The display panel driver according to claim 9 , wherein the precharging circuit outputs the first control signal and a second control signal of the plurality of control signals based on a comparison of the output voltage and a voltage supplied to the second node, and

wherein the voltage boosting operation of the output voltage by the voltage boosting circuit is controlled based on the second control signal.

12. The display panel driver according to claim 10 , further comprising:

a power supply circuit configured to generate the first power supply voltage to output to the voltage boosting circuit,

wherein a generating operation of the first power supply voltage by the power supply circuit is controlled based on the second control signal.

13. The display panel driver according to claim 11 , further comprising:

a power supply circuit configured to generate the first power supply voltage to output to the voltage boosting circuit,

wherein a generating operation of the first power supply voltage by the power supply circuit is controlled based on the second control signal.

14. The display panel driver according to claim 9 , wherein the precharging circuit further comprises:

a CMOS circuit configured to control the supply of the second power supply voltage to the second node.

15. A display apparatus comprising:

a display panel driver; and

a display panel having gate lines driven by a gate line drive signal,

wherein the display panel driver comprises:

an integrated circuit device; and

a gate driving circuit configured to generate the gate line drive signal based on an output voltage, to drive the gate lines of the display panel,

wherein the integrated circuit device comprises:

a voltage boosting circuit configured to operate on a first power supply voltage and boost the output voltage generated on a first node to a first voltage level and

a precharging circuit configured to supply a second power supply voltage to the first node, the second power supply voltage having a second voltage level lower than the first voltage level; and

a control signal generating circuit configured to generate a plurality of control signals, wherein the precharging circuit supplies the second power supply voltage to the first node before the first power supply voltage starts to be supplied to the voltage boosting circuit based on a first control signal of the plurality of control signals, and

wherein the voltage boosting circuit is operational to boost the output voltage, by a switching operation of transistors, to back gates of which the output voltage is supplied.

16. A voltage boosting method comprising:

generating a plurality of control signals;

supplying a second power supply voltage to a first node before a first power supply voltage starts to be supplied to a voltage boosting circuit based on first control signal of the plurality of control signals; and

boosting an output voltage generated on the first node to a first voltage level by the voltage boosting circuit operating on the first power supply voltage, the first voltage level being higher than a second voltage level of the second power supply voltage,

wherein the voltage boosting circuit is operational to boost the output voltage, by a switching operation of transistors, to back gates of which the output voltage is supplied.

17. The voltage boosting method according to claim 16 , further comprising:

controlling a start or end of the voltage boosting operation of the output voltage based on the supplied second power supply voltage, based on a comparison result of the output voltage and the supplied second power supply voltage.

18. The voltage boosting method according to claim 16 , further comprising:

controlling a start or end of the voltage boosting operation of the output voltage based on the first power supply voltage, based on a comparison result of the output voltage and the supplied second power supply voltage.

19. The voltage boosting method according to claim 16 , further comprising:

controlling a supply start of the first power supply voltage to the voltage boosting circuit, based on a comparison result of the output voltage and the supplied second power supply voltage.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2024
From: SYNAPTICS JAPAN GK
To: SYNAPTICS INCORPORATED
Reel/Frame 067793/0211 →
SECURITY INTEREST Recorded Sep 27, 2017
From: SYNAPTICS INCORPORATED
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 044037/0896 →
CHANGE OF NAME Recorded Aug 8, 2016
From: SYNAPTICS DISPLAY DEVICES GK
To: SYNAPTICS JAPAN GK
Reel/Frame 039711/0862 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2015
From: SAEKI, YUTAKA; KANESHIGE, KENICHI
To: SYNAPTICS DISPLAY DEVICES GK
Reel/Frame 036528/0870 →