IP Library Granted Patent US 10,453,948
Granted Patent B2
US 10,453,948 · App. 14/856,768 · Granted Oct 22, 2019

Semiconductor device which comprises transistor and diode

Inventor: Tadahiro Imada (Kawasaki, JP)
Assignee: FUJITSU LIMITED
H01L29/7787H01L27/0629H01L29/2003H01L29/205H01L29/41758H01L29/66462H01L29/7786H01L29/872H01L27/0207H01L27/085
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Quick Facts
Patent No.
US 10,453,948
App. No.
14/856,768
Granted
Oct 22, 2019
Kind
B2
Abstract

A transistor which includes an electron transit layer and an electron supply layer which are stacked in a thickness direction of a substrate; an electron transit layer formed over the substrate in parallel to the electron transit layer and the electron supply layer; an anode electrode which forms a Schottky junction with the electron transit layer; and a cathode electrode which forms an ohmic junction with the electron transit layer are provided. The anode electrode is connected to a source of the transistor, and the cathode electrode is connected to a drain of the transistor.

Claims (23)

1. A semiconductor device, comprising:

a substrate;

a transistor that comprises a first electron transit layer and an electron supply layer which are stacked in a thickness direction of the substrate;

a second electron transit layer formed above the first electron transit layer and the electron supply layer in parallel to the first electron transit layer and the electron supply layer;

an anode electrode that forms a Schottky junction with the second electron transit layer; and

a cathode electrode that forms an ohmic junction with the second electron transit layer, wherein

the anode electrode is connected to a source of the transistor, and

the cathode electrode is connected to a drain of the transistor,

wherein the transistor is located between the substrate and the second electron transit layer; and

the first electron transit layer and the electron supply layer are located between the substrate and the second electron transit layer, in the thickness direction of the substrate.

2. A semiconductor device, comprising:

a substrate;

a buffer layer formed above the substrate;

a first electron transit layer formed above the buffer layer;

an electron supply layer formed above the first electron transit layer;

a cap layer formed above the electron supply layer;

an insulating layer formed above the cap layer; and

a second electron transit layer formed above the insulating layer,

wherein the cap layer is located between the electron supply layer and the insulating layer, in the thickness direction of the substrate.

3. The semiconductor device according to claim 2 , wherein the cap layer is an n-type gallium nitride layer.

4. The semiconductor device according to claim 3 , further comprising:

a second n-type gallium nitride layer formed on the insulating layer,

wherein the insulating layer is made of an aluminum nitride or an aluminum gallium nitride.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
Continuity (3)
Division 13705548 · Dec 5, 2012
Continuation PCTJP2010060728 · Jun 24, 2010
Related Publication 20160005848A1 · Jan 7, 2016