Test systems and methods for chips in wafer scale photonic systems
A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.
1. A testing apparatus for a photonic chip on a substrate, comprising:
a wafer having constructed thereon a plurality of photonic chips, each comprising a circuit including an operating port configured to be used during normal operation of the photonic chip after being disconnected from other photonic chips on the wafer;
wherein at least one photonic chip from the plurality of photonic chips includes a test port configured to receive test light that propagates at a first angle to a free surface of said wafer, the test port configured to be used during a test of the at least one photonic chip or of an adjacent photonic chip which is conducted prior to the photonic chips being disconnected from each other and from other photonic chips on the wafer,
wherein the operating port is separated from the test port by a trench having non-parallel walls, and
wherein the test port and the operating port are disposed at different heights from the free surface of the wafer so as to optically couple the test port with the operating port across the trench with the non-parallel walls.
2. The testing apparatus of claim 1 further comprising a first edge coupler optically coupled to the test port, wherein the operating port comprises a second edge coupler, and wherein the first and second edge couplers are disposed at the different heights so as to cause the test light that propagates from the first edge coupler at the second angle to couple into the second edge coupler.
3. The testing apparatus of claim 2 wherein the first edge coupler and the second edge coupler each comprise a top surface and a bottom surface, wherein the bottom surface of each of the first edge coupler and the second edge coupler is farther from the free surface of the wafer than the top surface thereof, and wherein the top surface of one of the first edge coupler and the second edge coupler is disposed farther from the free surface of the wafer than the bottom surface of the other of the first edge coupler and the second edge coupler.
4. The testing apparatus of claim 1 further comprising a first grating coupler optically coupled to the test port, wherein the operating port comprises a second grating coupler, and wherein the first grating coupler and the second grating coupler are configured to be optically coupled across the trench with non-parallel walls.
5. The testing apparatus of claim 4 wherein the first grating coupler and the second grating coupler each comprise a top surface and a bottom surface, wherein the bottom surface of each of the first grating coupler and the second grating coupler is farther from the free surface of the wafer than the top surface thereof, and wherein the top surface of one of the first coupler and the second coupler is disposed farther from the free surface of the wafer than the bottom surface of the other of the first grating coupler and the grating second coupler.
6. The testing apparatus of claim 1 wherein the at least one photonic chip is configured so that the test port remains with the at least one photonic chip during normal operation thereof after the photonic chips are separated.
7. The testing apparatus of claim 1 wherein at least one of the test port and the operating port comprises a second grating coupler configured for optical coupling across the trench with non-parallel walls.