Method and System for Simulating a Noisy Communications Channel Based On a Cryptographic Function Implemented in FPGA or ASIC
A method of simulating communication channel noise comprising generating, by a FPGA or ASIC, a stream of uniformly distributed random variables using a cryptographic algorithm, applying a mathematical transform to the uniformly distributed random variables using the FPGA or ASIC to create a signal comprised of normally distributed random variables, adjusting a mean and variance of the signal using the FPGA or ASIC, outputting, by the FPGA or ASIC, an output noise signal, adding, by the FPGA or ASIC, I and Q samples of the output noise signal to I and Q symbols of a data carrier signal at complex baseband, modulating, using a modulator, the summed I and Q symbols to create a composite carrier signal, and upconverting using an upconverter, the composite carrier signal for transmission across a telecommunications channel to simulate a noisy telecommunications channel.
1 . A method of simulating communication channel noise comprising:
generating, by a field programmable gate array (FPGA) or application specific integrated circuit (ASIC), a stream of uniformly distributed random variables using a cryptographic algorithm;
applying a mathematical transform to the uniformly distributed random variables using the FPGA or ASIC to create a signal comprised of normally distributed random variables;
adjusting a mean and variance of the signal using the FPGA or ASIC;
outputting, by the FPGA or ASIC, an output noise signal;
adding, by the FPGA or ASIC, I and Q samples of the output noise signal to I and Q symbols of a data carrier signal at complex baseband;
modulating, using a modulator, the summed I and Q symbols to create a composite carrier signal; and
upconverting using an upconverter, the composite carrier signal for transmission across a telecommunications channel to simulate a noisy telecommunications channel.
2 . The method of claim 1 , further comprising adjusting a power level of the output noise signal.
3 . The method of claim 1 , wherein the cryptographic algorithm comprises a block cipher.
4 . The method of claim 3 , wherein the block cipher comprises an advanced encryption standard (AES) in cyclic block cipher (CBC) mode.
5 . The method of claim 1 , wherein at least one of a cipher input data, a cipher input key, and an initialization vector (IV) comprises a constant fixed value that is without periodic fluctuation.
6 . The method of claim 1 , wherein at least one of a cipher input data, a cipher input key, and an initialization vector (IV) comprises a dynamic value that changes periodically.
7 . The method of claim 1 , wherein the cryptographic algorithm comprises a stream cipher.
8 . The method of claim 1 , wherein the mathematical transform comprises one of a Box Muller method, a Ziggurat method, an Inversion method, and a Wallace method.
9 . The method of claim 1 , wherein applying the mathematical transform further comprises generating additive white Gaussian noise (AWGN) by adjusting a mean of the normally distributed random variable to zero and a variance of the normally distributed random variables to one.
10 . A system for simulating communication channel noise comprising:
a FPGA or ASIC configured to:
generate a stream of uniformly distributed random variables using a cryptographic algorithm;
apply a mathematical transform to the uniformly distributed random variables to create a signal comprised of normally distributed random variables;
adjust a mean and variance of the signal;
output an output noise signal; and
add I and Q samples of the output noise signal to I and Q symbols of a data carrier signal at complex baseband;
a modulator configured to modulate the summed I and Q symbols to create a composite carrier signal; and
an upconverter configured to upconvert the composite carrier signal for transmission across a telecommunications channel to simulate a noisy telecommunications channel.
11 . The system of claim 10 , wherein the FPGA or ASIC is further configured to adjust a power level of the output noise signal.
12 . The system of claim 10 , wherein the cryptographic algorithm comprises a block cipher.
13 . The system of claim 12 , wherein the block cipher comprises an advanced encryption standard (AES) in cyclic block cipher (CBC) mode.
14 . The system of claim 10 , wherein at least one of a cipher input data, a cipher input key, and an initialization vector (IV) comprises a constant fixed value that is without periodic fluctuation.
15 . The system of claim 10 , wherein at least one of a cipher input data, a cipher input key, and an initialization vector (IV) comprises a dynamic value that changes periodically.
16 . The system of claim 10 , wherein the cryptographic algorithm comprises a stream cipher.
17 . The system of claim 10 , wherein the mathematical transform comprises one of a Box Muller method, a Ziggurat method, an Inversion method, and a Wallace method.
18 . The system of claim 10 , wherein the FPGA or ASIC is further configured to generating additive white Gaussian noise (AWGN) by adjusting a mean of the normally distributed random variable to zero and a variance of the normally distributed random variables to one while applying the mathematical transform.
19 . The method of claim 1 , wherein generating the stream of uniformly distributed random variables using a cryptographic algorithm is done while maintaining a constant input value by applying an XOR operation to a cipher output of a previous block and using a resulting value as an input for a subsequent block.