IP Library Granted Patent US 9,431,050
Granted Patent B1
US 9,431,050 · App. 14/928,399 · Granted Aug 30, 2016

Preamplifier common-mode noise rejection for two-dimensional magnetic recording

Inventors: Jason P. Brenden (Woodbury, MN); David Fitzgerald (Inver Grove Heights, MN); Jeffrey A. Gleason (Mendota Heights, MN); Scott M. O'Brien (Mendota Heights, MN); Michael Straub (Mendota Heights, MN); Ross S. Wilson (Menlo Park, CA)
Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
G11B20/10009G11B5/012G11B5/09
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Quick Facts
Patent No.
US 9,431,050
App. No.
14/928,399
Granted
Aug 30, 2016
Kind
B1
Abstract

An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

Claims (31)

1. An apparatus for two-dimensional magnetic recording, comprising:

an array reader comprising a plurality of magnetoresistive read sensors configured to read data from a storage medium, the plurality of magnetoresistive read sensors comprising a plurality of connection terminals, wherein at least one of the connection terminals is shared by more than one of the plurality of magnetoresistive read sensors;

a plurality of low-noise amplifiers connected to the plurality of connection terminals, each of the plurality of low-noise amplifiers configured to amplify a differential signal from a different one of the plurality of magnetoresistive read sensors; and

a plurality of impedance networks connected to a subset of the plurality of connection terminals.

2. The apparatus of claim 1 , wherein the plurality of magnetoresistive read sensors are connected in a series string, and wherein two of the plurality of connection terminals comprise outer terminals at opposite ends of the series string, and wherein a remainder of the plurality of connection terminals comprise inner terminals between pairs of the plurality of magnetoresistive read sensors.

3. The apparatus of claim 2 , wherein the plurality of impedance networks are connected to the outer terminals.

4. The apparatus of claim 3 , wherein the plurality of impedance networks are configured to balance single ended impedance at the outer terminals with single ended impedance at the inner terminals.

5. The apparatus of claim 1 , wherein the plurality of magnetoresistive read sensors are connected in parallel, and wherein one of the plurality of connection terminals comprises a shared terminal connected to each of the plurality of magnetoresistive read sensors and a remainder of the plurality of connection terminals comprise dedicated terminals, each connected to a different one of the plurality of magnetoresistive read sensors.

6. The apparatus of claim 5 , wherein the plurality of impedance networks are connected to the dedicated terminals.

7. The apparatus of claim 6 , wherein the plurality of impedance networks are configured to balance single ended impedance at the dedicated terminals with single ended impedance at the shared terminal.

8. The apparatus of claim 1 , wherein the plurality of low-noise amplifiers comprise shunt feedback low-noise amplifiers, and wherein at least a portion of the plurality of impedance networks comprise an adjustment to resistance of feedback resistors in the shunt feedback low-noise amplifiers.

9. The apparatus of claim 8 , wherein at least a portion of the plurality of impedance networks comprise capacitors connected between outer terminals of the array reader and ground.

10. The apparatus of claim 1 , wherein at least some of the plurality of impedance networks comprise parallel resistor capacitor networks.

11. The apparatus of claim 1 , wherein at least some of the plurality of impedance networks comprise a resistor and a first capacitor connected in series, and a second capacitor connected in parallel to the resistor and the first capacitor.

12. The apparatus of claim 1 , wherein at least some of the plurality of impedance networks comprise a resistor and a switch connected in series, and a capacitor connected in parallel to the resistor and the switch.

13. The apparatus of claim 1 , wherein the plurality of impedance networks are connected between the subset of the plurality of connection terminals and an AC ground.

14. A method for accessing a magnetic storage device, comprising:

loading a subset of a plurality of magnetoresistive read sensors in a shared-pin array reader for a two-dimensional magnetic recording system with impedance networks to reduce differences in single ended impedance between terminals in the array reader;

biasing the plurality of magnetoresistive read sensors;

passing the plurality of magnetoresistive read sensors over a data track on a storage medium; and

amplifying an analog signal from each of the plurality of magnetoresistive read sensors.

15. The method of claim 14 , further comprising connecting the plurality of magnetoresistive read sensors in a series string to form the array reader, wherein the impedance networks are connected to outer terminals of the series string.

16. The method of claim 14 , further comprising connecting the plurality of magnetoresistive read sensors in parallel, each of the plurality of magnetoresistive read sensors being connected between a shared common terminal and a dedicated terminal for each of the plurality of magnetoresistive read sensors, wherein the impedance networks are connected to the dedicated terminals.

17. The method of claim 14 , further comprising selectably disconnecting the impedance networks from the array reader.

18. The method of claim 14 , wherein the impedance networks each comprise a resistor for low frequency impedance matching connected in parallel with a capacitor for high frequency impedance matching.

19. The method of claim 18 , further comprising disabling the resistor in the impedance networks to remove a DC load.

20. A storage system comprising:

a storage medium;

a two-dimensional magnetic recording head assembly disposed in relation to the storage medium and comprising a plurality of magnetoresistive read heads sharing a common lead;

impedance balancing network means for balancing single-ended impedance at each terminal in the two-dimensional magnetic recording head assembly, wherein at least some of the plurality of magnetoresistive read heads are balanced with impedance balancing network means with different impedances; and

means for amplifying signals from each of the plurality of magnetoresistive read heads.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2015
From: BRENDEN, JASON; FITZGERALD, DAVID; GLEASON, JEFFREY A.; O'BRIEN, SCOTT M.; STRAUB, MICHAEL; WILSON, ROSS S.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037042/0100 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2015
From: BRENDEN, JASON; FITZGERALD, DAVID; GLEASON, JEFFREY A.; O'BRIEN, SCOTT M.; STRAUB, MICHAEL; WILSON, ROSS S.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 036925/0690 →