Digitally controlled oscillator device and high frequency signal processing device

1. A digitally controlled oscillator device comprising:

first and second oscillation output nodes from which complementary oscillation output signals are output;

coil elements coupled between the first oscillation output node and the second oscillation output node;

a plurality of capacitor units coupled in parallel between the first oscillation output node and the second oscillation output node;

a negative resistance generating circuit which generates a negative resistance between the first oscillation output node and the second oscillation output node; and

a control circuit which controls the capacitor units,

wherein each of the capacitor units includes capacitive elements, and a control node which selects whether the capacitive elements are coupled to the first and second oscillation output nodes as set parameters for an oscillation frequency,

wherein the control circuit drives the respective control nodes in the capacitor units through a plurality of control lines,

wherein the control lines include first and second control lines,

wherein the first control line is coupled to the control nodes of 2 N (where N: integer equal to or greater than 0) capacitor units of the capacitor units,

wherein the second control line is coupled to the control nodes of 2 M (where M: integer equal to or greater than 0) capacitor units of the capacitor units,

wherein the control circuit includes a first buffer circuit which drives the first control line, and a second buffer circuit which drives the second control line, and

wherein a drive capacity of the second buffer circuit is 2 (M-N) times with a drive capacity of the first buffer circuit as a reference.

2. The digitally controlled oscillator device according to claim 1 , wherein a first shield layer is disposed between the control lines and the first oscillation output node in such a manner as to effectively shield between the control lines and the first oscillation output node.

3. The digitally controlled oscillator device according to claim 1 , wherein a part of the first shield layer is disposed so as to surround all the peripheries of the control lines over a section.

4. The digitally controlled oscillator device according to claim 3 , further comprising:

a division circuit which divides each of the complementary oscillation output signals and thereby outputs a division oscillation signal;

a phase difference detection circuit which compares the phase of a reference oscillation signal input in advance with the phase of the division oscillation signal and outputs the result of comparison as a first digital code;

a digital filter which performs an averaging process with the first digital code as a target and outputs a second digital code; and

a sigma delta modulation circuit which sets a division ratio to the division circuit and changes the division ratio on a time-series basis,

wherein the control circuit drives the control nodes in the capacitor units according to the magnitude of the second digital code.

5. The digitally controlled oscillator device according to claim 1 ,

wherein the negative resistance generating circuit operates at a first power supply,

wherein the control circuit operates at a second power supply different from the first power supply, and

wherein the first shield layer is supplied with the second power supply.

6. The digitally controlled oscillator device according to claim 1 , wherein a second shield layer is disposed between the control circuit and the first and second oscillation output nodes in such a manner as to effectively shield between the control circuit and the first and second oscillation output nodes.

7. The digitally controlled oscillator device according to claim 1 ,

wherein each of the capacitor units includes:

a first capacitive element having one end coupled to the first oscillation output node;

a second capacitive element having one end coupled to the second oscillation output node;

a first switch coupled to the other end of the first capacitive element and the other end of the second capacitive element and on/off-controlled by the control node;

a second switch coupled between the other end of the first capacitive element and a power supply node and on/off-controlled by the control node; and

a third switch coupled between the other end of the second capacitive element and the power supply node and on/off-controlled by the control node.