Low voltage switch control
View Patent ↗Systems and methods are disclosed, including, for example, a low-voltage control circuit configured to receive a charge pump voltage, a rail voltage, and a switch control signal, to provide the charge pump voltage when the switch control signal is in a first state, and to provide the higher of the charge pump voltage and the rail voltage when the switch control signal is in a second state. The system can include a first pick-high circuit configured to receive the rail voltage and the charge pump voltage, and to provide the higher of the rail voltage and the charge pump voltage at an output. The switch control signal, in the first state, can include the output of the pick-high circuit. Methods of forming such apparatus are disclosed, as well as methods of operation, and other embodiments.
1. A low-voltage control system, comprising:
a pass gate configured to pass a signal from a first terminal to a second terminal in a first, low-impedance state, and to isolate the first terminal from the second terminal in a second, high-impedance state; and
a low-voltage control circuit configured to provide a charge pump voltage when the pass gate is in the first, low-impedance state, and to provide the higher of the charge pump voltage and a rail voltage when the pass gate is in the second, high-impedance state, the pass gate being controlled using the low-voltage control circuit;
a first pick-high circuit configured to receive the rail voltage and the charge pump voltage, and to provide the higher of the charge pump voltage and the rail voltage as a pick-high voltage to the low-voltage control circuit; and
a second pick-high circuit configured to receive a source voltage and a first terminal voltage of the pass gate, and to provide the higher of the source voltage and the first terminal voltage as the rail voltage.
2. The system of claim 1 , wherein:
the low-voltage control circuit is configured to receive a switch control signal, and
when the pass gate is in the first, low-impedance state, the switch control signal is configured to be the higher of the charge pump voltage and the rail voltage.
3. The system of claim 1 , wherein:
the low-voltage control circuit includes first and second p-type semiconductor (PMOS) transistors, each including a source, a gate, and a drain,
the drain of the first PMOS transistor is configured to receive the rail voltage, and the drain of the second PMOS transistor is configured to receive the charge pump voltage.
4. The system of claim 1 , wherein:
the low-voltage control circuit is configured to receive a switch control signal, to provide the charge pump voltage when the switch control signal is in a first state, and to provide the higher of the charge pump voltage and the rail voltage when the switch control signal is in a second state, and
the switch control signal in the first state is from the first pick-high circuit.
5. The system of claim 1 , wherein:
the low-voltage control circuit is configured to receive a switch control signal, and
the pass gate is in the first, low-impedance state when the switch control signal is in the first state.
6. The system of claim 1 , wherein:
the second pick-high circuit is configured to receive a source voltage and a first terminal voltage of the pass gate,
the first terminal voltage is the voltage at the first terminal of the pass gate, and
the charge pump voltage is based on the first terminal voltage.
7. The system of claim 6 , wherein:
the second pick-high circuit is configured to receive the source voltage, the first terminal voltage of the pass gate, and a second terminal voltage of the pass gate,
the second terminal voltage is the voltage at the second terminal of the pass gate, and
the charge pump voltage is based on at least one of the first or second terminal voltages.
8. The system of claim 1 , wherein the pick-high voltage from the first pick-high circuit is a first pick-high voltage, the second pick-high circuit provides a second pick-high voltage as the higher of the first terminal voltage, a second terminal voltage of the pass gate, and the source voltage,
the system further comprising:
a translator circuit configured to receive the first pick-high voltage, the second pick-high voltage, and a control signal, the translator circuit configured to provide an output using the higher of the first and second pick-high voltages and the control signal,
wherein, when the pass gate is in the first, low-impedance state, a switch control signal includes the output of the translator circuit.
9. A low-voltage control apparatus, comprising:
a first pick-high circuit configured to receive a rail voltage and a charge pump voltage, and to provide the higher of the rail voltage and the charge pump voltage as a pick-high voltage;
a second pick-high circuit configured to receive a source voltage and a first terminal voltage of a pass gate, and to provide the higher of the source voltage and the first terminal voltage as the rail voltage; and
a low-voltage control circuit configured to receive the charge pump voltage, the rail voltage, and a switch control signal, the low-voltage control circuit configured to receive the pick-high voltage from the first pick-high circuit;
the low-voltage control circuit configured to provide the charge pump voltage when the switch control signal is in a first state, and to provide the higher of the charge pump voltage and the rail voltage when the switch control signal is in a second state,
the switch control signal in the first state including the pick-high voltage of the first pick-high circuit.
10. The apparatus of claim 9 , wherein:
the pass gate is configured to pass a signal from the first terminal to a second terminal in a first, low-impedance state, and to isolate the first terminal from the second terminal in a second, high-impedance state,
the pass gate is controlled using the low-voltage control circuit.
11. The apparatus of claim 10 , wherein, when the pass gate is in the first, low-impedance state, the switch control signal is configured to be the higher of the charge pump voltage and the rail voltage.
12. The apparatus of claim 9 , wherein:
the low-voltage control circuit includes first and second p-type semiconductor (PMOS) transistors, each including a source, a gate, and a drain,
the drain of the first PMOS transistor is configured to receive the rail voltage, and the drain of the second PMOS transistor is configured to receive the charge pump voltage, and
the sources of the first and second PMOS transistors is configured to receive the pick-high voltage.
13. The apparatus of claim 9 , wherein:
the first terminal voltage is the voltage at the first terminal of the pass gate, and
the charge pump voltage is based on the first terminal voltage.
14. The apparatus of claim 13 , wherein:
the second pick-high circuit is configured to receive a second terminal voltage of the pass gate, and to provide the higher of the first terminal voltage, the second terminal voltage, and the source voltage as the rail voltage,
the second terminal voltage is the voltage at the second terminal of the pass gate, and
the charge pump voltage is based on at least one of the first or second terminal voltages.
15. The apparatus of claim 14 , wherein the pick-high voltage from the first pick-high circuit is a first pick-high voltage, the second pick-high circuit provides a second pick-high voltage as the higher of the first terminal voltage, the second terminal voltage, and the source voltage,
the apparatus further comprising:
a translator circuit configured to receive the first pick-high voltage, the second pick-high voltage, and a control signal, the translator circuit configured to provide an output using the higher of the first and second pick-high voltages and the control signal,
the switch control signal includes the output of the translator circuit when the pass gate is in a first, low-impedance state.
16. A method comprising:
producing a pick-high voltage at a first pick-high circuit based on a rail voltage and a charge pump voltage;
producing a rail voltage at a second pick-high circuit based on a source voltage and a first terminal voltage of a pass gate;
receiving the charge pump voltage, the rail voltage, and a switch control signal at a low-voltage control circuit;
providing the higher of the charge pump voltage and the rail voltage as a pick-high voltage to the low-voltage control circuit; and
providing the charge pump voltage at an output of the low-voltage control circuit when the switch control signal is in a first state, and the higher of the charge pump voltage and the rail voltage when the switch control signal is in a second state.
17. The method of claim 16 , further comprising:
passing a signal from a first terminal of a pass gate to a second terminal of the pass gate in a first, low-impedance state;
isolating the first terminal of the pass gate from the second terminal of the pass gate in a second, high-impedance state; and
controlling the pass gate using the output of the low-voltage control circuit.
18. The method of claim 16 , wherein:
the low-voltage control circuit includes first and second p-type semiconductor (PMOS) transistors, each including a source, a gate, and a drain,
the drain of the first PMOS transistor is configured to receive the rail voltage, and the drain of the second PMOS transistor is configured to receive the charge pump voltage, and
the sources of the first and second PMOS transistors are configured to receive the pick-high voltage.
19. The method of claim 16 ,
wherein the switch control signal in the first state includes the pick-high voltage of the first pick-high circuit.
20. The method of claim 19 ,
wherein the charge pump voltage is based on the first terminal voltage.
21. The low-voltage control system of claim 1 , further comprising:
a translator configured to receive the pick-high voltage and configured to provide a translated output to drive the low-voltage control circuit.