Optically aligned hybrid semiconductor device and method

1. A method of fabricating an optically aligned hybrid semiconductor device, the method comprising:

a) providing a first semiconductor chip comprising a first alignment surface, a first bonding pad, and a first optical waveguide, wherein the first alignment surface is positioned with a first offset from an optical axis of the first optical waveguide;

b) providing a second semiconductor chip comprising a second alignment surface, a second bonding pad, and a second optical waveguide, wherein the second alignment surface is positioned with a second offset from an optical axis of the second optical waveguide, wherein one of the first and second offsets is epitaxially-defined in the respective first or second semiconductor chip to complement the other of the first and second offsets so that when the first and second alignment surfaces are in contact abutting each other, the first and second waveguides are aligned in a direction normal to the first and second alignment surfaces;

c) aligning first and second semiconductor chips with the first and second alignment surfaces facing each other; and,

d) bringing the first and second semiconductor chips together until the first and second alignment surfaces come to a stop against each other, with the first and second alignment surfaces being in direct contact with each other and the first and second optical waveguides being optically coupled,

wherein providing at least one of the first and second semiconductor chips includes:

growing a stack of epitaxial layers comprising the first or second optical waveguide sandwiched between two cladding layers, and

forming one of the first alignment surface or the second alignment surface by selectively etching the stack of epitaxial layers using a layer-selective etch so as to expose at least an area of an epitaxy-defined layer surface of one of the epitaxial layers of the stack;

wherein one of the first and second bonding pads is offset relative to one of the first or second alignment surfaces in the respective first or second semiconductor chips so that when the first and second alignment surfaces are brought in contact with each other in step (d), there exists a gap G between the first and second bonding pads.

2. The method of claim 1 , further comprising disposing a compliant bonding agent upon at least one of the first and second bonding pads prior to (d), and causing the compliant bonding agent to connect the bonding pads in step (d).

3. The method of claim 2 wherein the bonding pads are electrically conductive, wherein the bonding agent comprises electrically conducting solder, and wherein the method includes heating the electrically conducting solder to a near-melting temperature.

4. An optically aligned hybrid semiconductor device comprising:

a first semiconductor chip comprising a first alignment surface and a first optical waveguide having an optical axis, wherein the first alignment surface is positioned with a first offset from the optical axis of the first optical waveguide, wherein the first semiconductor chip comprises a substrate; and,

a second semiconductor chip comprising a second alignment surface and a second optical waveguide having an optical axis, wherein the second alignment surface is positioned with a second offset from the optical axis of the second optical waveguide, wherein the second offset is complementary to the first offset, wherein the second semiconductor chip comprises a compound semiconductor substrate and a stack of epitaxial layers grown thereupon so as to define the second alignment surface at an exposed surface of one of the epitaxial layers of the stack; and

wherein the second semiconductor chip is disposed upon the first semiconductor chip so that the second alignment surface directly abuts the first alignment surface in a contact therewith, and the first and second optical waveguides are aligned and optically coupled;

wherein each of the first and second semiconductor chips further comprises a bonding pad, said bonding pads disposed to face each other with a gap therebetween,

wherein the gap comprises a bonding agent for bonding the second chip to the first chip, and

wherein one of the bonding pads is disposed upon a surface of the second semiconductor chip that is offset from the second alignment surface.

5. A method of fabricating an optically aligned hybrid semiconductor device, the method comprising:

a) obtaining a first semiconductor chip comprising a first alignment surface and a first optical waveguide formed upon a substrate, wherein the first alignment surface is positioned with a first offset from an optical axis of the first optical waveguide;

b) obtaining a second semiconductor chip comprising a second alignment surface and a second optical waveguide formed upon a compound semiconductor substrate, wherein the second alignment surface is positioned with a second offset from an optical axis of the second optical waveguide, wherein the first and second offsets are complementary so that when the first and second alignment surfaces are in contact with each other, the first and second waveguides extend in a common plane;

wherein obtaining the second semiconductor chip includes using thickness-controlled epitaxy to grow a first stack of epitaxial layers upon the compound semiconductor substrate so as to define a position of the second alignment surface in the first stack of epitaxial layers at a layer surface of a top epitaxial layer thereof;

c) aligning first and second semiconductor chips with the first and second alignment surfaces facing each other; and,

d) bringing the first and second semiconductor chips together until the first and second alignment surfaces come to a stop against each other, with the first and second alignment surfaces being in direct contact abutting each other and the first and second optical waveguides being optically coupled;

providing each of the first and second semiconductor chips with a bonding pad that is electrically conducting and is disposed upon an electrically conducting surface of the respective chip, the bonding pads positioned to face each other with a gap therebetween when the first and second semiconductor chips brought together in step (d) and the first and second alignment surfaces are in direct contact abutting each other;

depositing a compliant electrically conducting bonding agent upon at least one of the bonding pads to a total height exceeding the gap;

wherein d) comprises:

bringing the first and second semiconductor chips together to first cause the compliant electrically conducting bonding agent to touch the bonding pads of both the first and second semiconductor chip;

bringing the first and second semiconductor chips further together until the first and second alignment surfaces come to a stop against each other; and,

causing the compliant electrically conducting agent to solidify, thereby providing electrical and mechanical bonding between the first and second semiconductor chips.

6. The method of claim 5 , wherein step a) comprises:

growing a second stack of epitaxial layers including the first optical waveguide, a cladding layer, and an etch-stop layer with a top layer surface of the etch-stop layer disposed at the first offset from an optical plane of the first optical waveguide, and

selectively etching the second stack of epitaxial layers up to the etch stop layer so as to expose at least an area thereof to form the first alignment surface.

7. The method of claim 1 , wherein step a) comprises:

growing a first stack of epitaxial layers including the first optical waveguide, a cladding layer, and an etch-stop layer with a top layer surface of the etch-stop layer disposed at the first offset from an optical plane of the first optical waveguide, and

selectively etching the first stack of epitaxial layers up to the etch stop layer so as to expose at least an area thereof to form the first alignment surface.

8. The method of claim 1 , wherein step b) comprises using thickness-controlled epitaxy to grow a second stack of epitaxial layers upon a compound semiconductor substrate so as to define a position of the second alignment surface in the second stack of epitaxial layers at a layer surface of a top epitaxial layer thereof.

9. The device of claim 4 , wherein the first semiconductor chip includes a cladding layer, and an etch-stop layer with a top layer surface of the etch-stop layer disposed at the first offset from an optical plane of the first optical waveguide, and

wherein the first alignment surface comprises an exposed area of the etch stop layer.

10. The device of claim 4 , wherein the second semiconductor chip includes a second stack of epitaxial layers upon the substrate; and wherein the second alignment surface comprises a layer surface of a top epitaxial layer thereof.