IP Library Granted Patent US 9,864,468
Granted Patent B2
US 9,864,468 · App. 15/177,489 · Granted Jan 9, 2018

Multi-touch integrity sensing for capacitive touch screen

Inventors: Jerry Kim (Kyounggi-Do, KP); Tae-gil Kang (Icheon-Si, KP); Glen Kang (Seoul, KP); Rooney Kim (Bakdal 1-Dong, KP)
Assignee: STMicroelectronics Asia Pacific Pte Ltd
G06F3/0418G06F3/044G06F2203/04104
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Quick Facts
Patent No.
US 9,864,468
App. No.
15/177,489
Granted
Jan 9, 2018
Kind
B2
Abstract

A method for multi-touch integrity sensing for a multi-touch capacitive touch screen is disclosed. By determining the integrity of touches, a distinction is identified between wanted touches, such as via a finger or stylus, and unwanted touches such as via foreign matter, errors, and the like.

Claims (71)

1. A method of touch island integrity checking, comprising:

identifying a first set of touched nodes of a capacitive sensing panel by a first mode of operation;

identifying a second set of touched nodes of the capacitive sensing panel by a second mode of operation;

creating a processing mask based on the second set of touched nodes;

classifying all nodes of the first set of touched nodes in response to the processing mask; and

indicating a processing status comprising one of a success state and a failure state in response to the classifying.

2. The method of touch island integrity checking according to claim 1 , further comprising switching the capacitive sensing panel to the second mode of operation in response to the processing status comprising the failure state.

3. The method of touch island integrity checking according to claim 1 , further comprising providing an output in response to the processing status comprising the success state.

4. The method of touch island integrity checking according to claim 1 , wherein the processing mask comprises a data array indicating state information for each node of the touched nodes.

5. The method of touch island integrity checking according to claim 4 , wherein the state information comprises a self-capacitance strength.

6. The method of touch island integrity checking according to claim 5 , wherein the state information further comprises a self-capacitance touch flag.

7. The method of touch island integrity checking according to claim 4 ,

wherein the second mode of operation comprises a self-capacitance mode and the first mode of operation comprises a mutual capacitance mode.

8. The method of touch island integrity checking according to claim 7 , wherein the state information comprises at least one of:

(i) mutual capacitance strength comprising a scalar numerical value representative of a strength of a capacitance associated with the node in the first mode of operation; and

(ii) a self-capacitance touch flag comprising a binary indication of whether a self-capacitance strength of the capacitance associated with the node in the second mode of operation exceeds a self-capacitance touch threshold.

9. The method of touch island integrity checking according to claim 8 ,

wherein the classifying the nodes comprises assigning an integrity index to each node comprising a numerical value associated with each node of the first set of touched nodes, a magnitude of which is correlated to the processing mask,

wherein the integrity index comprises one of: a touch state, a foreign material state, and a null state assigned to each node,

wherein the touch state comprises:

(i) the self-capacitance touch flag indicates a touch, and

(ii) the mutual capacitance strength exceeds a first mutual capacitance strength threshold;

wherein the foreign material state comprises one of:

(i) the self-capacitance touch flag fails to indicate the touch, and

(ii) the mutual capacitance strength does not exceed the first mutual capacitance strength threshold;

wherein the null state comprises:

(i) the self-capacitance touch flag and the mutual capacitance strength provide contradictory indications.

10. The method of touch island integrity checking according to claim 9 , wherein the indicating the processing status comprises comparing the integrity index of each classified node against a plurality of integrity rules.

11. The method of touch island integrity checking according to claim 1 ,

wherein the first mode of operation comprises a mutual capacitance mode and the first set of touched nodes comprises mutual capacitance touched nodes,

wherein the second mode of operation comprises a self-capacitance mode and the second set of touched nodes comprises self-capacitance;

wherein the processing mask comprises a node mapping overlay comprising a matrix of values that distinguish areas of a valid touch from areas lacking the valid touch;

wherein the step of classifying the nodes of the first set of touched nodes comprises mapping mutual capacitance touched nodes into touch islands; and

wherein the processing status comprises a touch island integrity.

12. A method of touch island integrity checking, comprising:

identifying mutual capacitance touched nodes of a capacitive sensing panel by a mutual capacitance mode;

identifying self-capacitance touched nodes of the capacitive sensing panel by a self-capacitance mode;

creating a node mapping overlay based on self-capacitance touched nodes;

mapping mutual capacitance touched nodes into touch islands according to the node mapping overlay; and

confirming a touch island integrity in response to the mapping.

13. The method of touch island integrity checking according to claim 12 , wherein the confirming the touch island integrity comprises steps of:

counting a first sum of first axis self-capacitance strength maxima;

counting a second sum of second axis self-capacitance strength maxima;

counting a third sum of the touch islands;

computing a peak area comprising a product of the first sum and the second sum; and

executing an integrity check comprising setting a integrity check flag to a true status in response to verifying that the second sum is less than or equal to the peak area and greater than or equal to the larger of the first sum and the second sum, and otherwise setting the integrity check flag to a false status.

14. The method of touch island integrity checking according to claim 13 , further comprises performing a step of multi-touch sensing with self-capacitance nodes in response to the integrity check having the false status, wherein the step of multi-touch sensing has substeps comprising:

summing the mutual capacitance strengths of all nodes within the touch island;

in response to the sum being greater than a first threshold, confirming an integrity of the touch island and computing a first touch island count range comprising a range of values bounded by a lower bound comprising the larger of the first sum and the second sum, and bounded by an upper bound comprising the peak area.

15. A touch screen controller, comprising:

a node identification engine configured to identify a first set of touched nodes of a capacitive sensing panel by a first mode of operation and to identify a second set of touched nodes of the capacitive sensing panel by a second mode of operation;

a mask generation engine configured to create a processing mask based on the second set of touched nodes;

a node classification engine configured to classify the nodes of the first set of touched nodes in response to the processing mask; and

a classified node processing engine configured to indicate a processing status comprising one of a success state and a failure state in response to the classifying.

16. The touch screen controller according to claim 15 , wherein the processing mask comprises a data array indicating state information for each of the touched nodes.

17. The touch screen controller according to claim 16 , wherein the state information comprises a self-capacitance strength.

18. The touch screen controller according to claim 17 , wherein the state information further comprises a self-capacitance touch flag.

19. The touch screen controller according to claim 16 ,

wherein the second mode of operation comprises a self-capacitance mode and the first mode of operation comprises a mutual capacitance mode,

wherein the state information comprises at least one of a mutual capacitance strength comprising a scalar numerical value representative of a strength of a capacitance associated with the node in the first mode of operation, and a self-capacitance touch flag comprising a binary indication of whether a self-capacitance strength of the capacitance associated with the node in the second mode of operation exceeds a self-capacitance touch threshold.

20. The touch screen controller according to claim 19 ,

wherein the classifying the nodes comprises assigning an integrity index to each node comprising a numerical value associated with each node of the first set of touched nodes, a magnitude of which is correlated to the processing mask,

wherein the integrity index comprises an assignment of one of a touch state, a foreign material state and a null state to each node,

wherein the touch state comprises:

(i) the self-capacitance touch flag indicates a touch, and

(ii) the mutual capacitance strength exceeds a first mutual capacitance strength threshold;

wherein the foreign material state comprises:

(i) the self-capacitance touch flag fails to indicate the touch, or

(ii) the mutual capacitance strength does not exceed the first mutual capacitance strength threshold;

wherein the null state comprises:

(i) the self-capacitance touch flag and the mutual capacitance strength provide contradictory indications.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2024
From: STMICROELECTRONICS ASIA PACIFIC PTE LTD
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 068434/0191 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2016
From: KIM, JERRY; KANG, TAE-GIL; KANG, GLEN; KIM, ROONEY
To: STMICROELECTRONICS ASIA PACIFIC PTE LTD
Reel/Frame 038854/0304 →
Continuity (1)
Related Publication 20170357371A1 · Dec 14, 2017