IP Library Granted Patent US 10,014,439
Granted Patent B2
US 10,014,439 · App. 15/215,968 · Granted Jul 3, 2018

System and method for providing an electron blocking layer with doping control

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Quick Facts
Patent No.
US 10,014,439
App. No.
15/215,968
Granted
Jul 3, 2018
Kind
B2
Abstract

Aspects of the disclosure pertain to a system and method for providing an electron blocking layer with doping control. The electron blocking layer is included in a semiconductor assembly. The electron blocking layer includes a lithium aluminate layer. The lithium aluminate layer promotes reduced diffusion of magnesium into a layer stack of the semiconductor assembly.

Claims (29)

1. A semiconductor assembly, comprising:

a layer stack, wherein the layer stack is an active layer; and

an electron blocking layer formed upon the layer stack; and

a lithium aluminate layer that inhibits diffusion of magnesium into the layer stack by separating the layer stack from a magnesium-doped layer.

2. The semiconductor assembly of claim 1 , wherein the layer stack includes a substrate.

3. The semiconductor assembly of claim 2 , wherein the layer stack includes a cladding layer, the cladding layer being formed upon the substrate.

4. The semiconductor assembly of claim 3 , wherein the layer stack includes one or more barrier layers, a first barrier layer included in the one or more barrier layers being formed upon the cladding layer.

5. The semiconductor assembly of claim 4 , wherein the layer stack includes one or more quantum well layers, a quantum well layer included in the one or more quantum well layers being formed upon the first barrier layer.

6. The semiconductor assembly of claim 5 , wherein the lithium aluminate layer is patterned.

7. The semiconductor assembly of claim 6 , wherein the patterned layer of lithium aluminate forms uniformly-spaced stripes or islands of lithium aluminate.

8. The semiconductor assembly of claim 6 , wherein the patterned lithium aluminate layer is formed upon an aluminum nitride layer, the aluminum nitride layer being formed upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

9. The semiconductor assembly of claim 6 , wherein the patterned lithium aluminate layer forms multiple rows of interleaved islands.

10. The semiconductor assembly of claim 9 , wherein the patterned lithium aluminate layer is formed upon an aluminum nitride layer, the aluminum nitride layer being formed upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

11. The semiconductor assembly of claim 5 , wherein the lithium aluminate layer is formed directly upon a second barrier layer included in the one or more barrier layers, the second barrier layer being formed upon the quantum well layer.

12. The semiconductor assembly of claim 5 , wherein a gallium nitride layer is formed upon the electron blocking layer.

13. The semiconductor assembly of claim 1 , wherein the layer stack is formed upon a lithium aluminate substrate.

14. A semiconductor assembly, comprising:

a layer stack; and

an electron blocking layer formed upon the layer stack; and

a lithium aluminate layer that inhibits diffusion of magnesium into the layer stack by separating the layer stack from a magnesium-doped layer, wherein the electron blocking layer comprises the lithium aluminate layer and the magnesium-doped layer.

15. An assembly, comprising:

a layer stack, the layer stack including a cladding layer and one or more barrier layers, a first barrier layer included in the one or more barrier layers being formed upon the cladding layer, the layer stack further including one or more quantum well layers, a quantum well layer included in the one or more quantum well layers being formed upon the first barrier layer;

an electron blocking layer formed upon the layer stack; and

a lithium aluminate layer that at least partially blocks diffusion of magnesium into the layer stack by its physical position being between the layer stack and a source of magnesium.

16. The assembly of claim 15 , wherein the layer stack is formed upon a lithium aluminate substrate.

17. The assembly as claimed in claim 16 , wherein the cladding layer is a silicon-doped gallium nitride cladding layer.

18. The assembly as claimed in claim 17 , wherein the one or more barrier layers are silicon-doped gallium nitride barrier layers.

19. The assembly as claimed in claim 18 , wherein the one or more quantum well layers are silicon-doped indium gallium nitride quantum well layers.

20. The assembly as claimed in claim 15 , wherein the source of magnesium comprises a magnesium-doped layer, wherein the electron blocking layer comprises the magnesium-doped layer and the lithium aluminate layer, and wherein the lithium aluminate layer is positioned between the magnesium-doped layer and the layer stack.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047422 FRAME: 0464. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048883/0702 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047422/0464 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2018
From: FREUND, JOSEPH M.; DELUCCA, JOHN M.
To: LSI CORPORATION
Reel/Frame 045954/0157 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2018
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 046284/0745 →