Self-shielded die having electromagnetic shielding on die surfaces

1. A self-shielded die, comprising:

a hybrid substrate comprising a base semiconductor substrate and a lid semiconductor substrate, bonded to the base semiconductor substrate;

an electronic device attached to the base semiconductor substrate in a cavity pre-formed between the base and lid semiconductor substrates;

one or more electrical pads disposed on a bottom surface of the base semiconductor substrate, at least one of the one or more electrical pads being electrically connected to the electronic device; and

an electromagnetic interference (EMI) shield formed of at least one electrically conductive material and connected to ground, the EMI shield comprising a top shield layer, disposed directly on and substantially completely covering a top surface of the hybrid substrate opposite the bottom surface of the hybrid substrate, and side shield layers substantially completely covering all sides of the hybrid substrate, extending between the top surface of the hybrid substrate and the bottom surface of the hybrid substrate.

2. The self-shielded die of claim 1 , wherein the EMI shield effectively forms a Faraday cage around the electronic device.

3. The self-shielded die of claim 1 , wherein at least a portion of the at least one electrically conductive material of the side shield layers of the EMI shield comprises a wafer level metal layer.

4. The self-shielded die of claim 3 , wherein an additional portion of the at least one electrically conductive material of the side shield layers comprises a metal layer extending from the top shield layer down the sides of the hybrid substrate, over at least a portion of the wafer level metal layer, the additional portion of the at least one electrically conductive material being the same material as the top shield layer.

5. The self-shielded die of claim 1 , wherein the at least one electrically conductive material of the side shield layers comprises a single metal layer, which extends from the top shield layer down at least a portion of the sides of the hybrid substrate.

6. The self-shielded die of claim 1 , wherein the EMI shield is connected to ground via a solder joint between at least one of the side shield layers and a corresponding at least one ground pad on a package substrate to which the self-shielded die is attached.

7. The self-shielded die of claim 1 , wherein one electrical pad of the one or more electrical pads disposed on the bottom surface of the hybrid substrate is connected to a ground pad on a package substrate to which the self-shielded die is attached, the one electrical pad including a metal extension that extends across the bottom surface of the hybrid substrate to at least an edge of the hybrid substrate, and

wherein the EMI shield is connected to ground via the metal extension of the one electrical pad.

8. The self-shielded die of claim 1 , wherein the EMI shield is connected to ground via a bond wire directly connected to a ground pad on a package substrate to which the self-shielded die is attached.

9. The self-shielded die of claim 1 , wherein the electronic device is an acoustic filter comprising a bulk acoustic wave (BAW) resonator arranged in the cavity.

10. The self-shielded die of claim 1 , wherein one electrical pad of the one or more electrical pads disposed on the bottom surface of the hybrid substrate is connected to a ground pad on a package substrate to which the self-shielded die is attached, and

wherein the EMI shield is connected to ground by a metalized through-wafer via that passes through the hybrid substrate and is connected to the one electrical pad connected to the ground pad.

11. A device, comprising:

a hybrid substrate comprising a base substrate and a lid substrate, bonded together, and defining an internal cavity between the bonded base and lid substrates, each of the base substrate and the lid substrate being formed of a semiconductor material;

a film bulk acoustic wave resonator (FBAR), including a pair of electrodes, arranged in the cavity;

one or more electrical pads disposed on a bottom surface of the hybrid substrate, at least one of the one or more electrical pads being electrically connected to one of the electrodes; and

an electromagnetic interference (EMI) shield formed of at least one electrically conductive material and electrically connected to ground, the EMI shield comprising a top shield layer, disposed directly on and substantially completely covering a top surface of the hybrid substrate opposite the bottom surface of the hybrid substrate, and side shield layers substantially completely covering all sides of the hybrid substrate, extending between the top surface of the hybrid substrate and the bottom surface of the hybrid substrate,

wherein the side shield layers include wafer level deposits of the at least one electrically conductive material.

12. The device of claim 11 , further comprising a package substrate to which the hybrid substrate is attached, wherein at least one of the electrical pads disposed on the bottom surface of the hybrid substrate is electrically connected to a ground pad on the package substrate, and

wherein the EMI shield is directly connected to the at least one of the electrical pads electrically connected to a ground pad.

13. The device of claim 11 , further comprising a package substrate to which the hybrid substrate is attached, wherein the package substrate includes at least one ground pad, and wherein the EMI shield is soldered directly via at least one of the side shield layers to the at least one ground pad of the package substrate.

14. The device of claim 11 , further comprising a package substrate to which the hybrid substrate is attached, wherein the package substrate includes at least one ground pad, and wherein the device further comprises a bond wire directly connecting the at least one ground pad to the EMI shield.

15. The device of claim 11 , further comprising at least one copper pillar provided on at least one of the one or more electrical pads.

16. A package device, comprising:

a package substrate;

a first self-shielded die connected to the package substrate, the first self-shielded die comprising:

a first hybrid semiconductor substrate;

a first acoustic filter arranged in an internal cavity defined by the first hybrid semiconductor substrate;

one or more first electrical pads disposed on a bottom surface of the first hybrid semiconductor substrate, at least one of the first electrical pads being electrically connected to the first acoustic filter; and

a first electromagnetic interference (EMI) shield formed of an electrically conductive material and connected to ground, the first EMI shield comprising a first top shield layer, disposed directly on and substantially completely covering a top surface of the first hybrid semiconductor substrate opposite the bottom surface of the first hybrid semiconductor substrate, and first side shield layers substantially completely covering all sides of the first hybrid semiconductor substrate; and

a second self-shielded die connected to the package substrate adjacent the first self-shielded die, the second self-shielded die comprising:

a second hybrid semiconductor substrate;

a second acoustic filter attached to the second hybrid semiconductor substrate;

one or more second electrical pads disposed on a bottom surface of the second hybrid semiconductor substrate, at least one of the second electrical pads being electrically connected to the second acoustic filter; and

a second EMI shield formed of an electrically conductive material and connected to ground, the second EMI shield comprising a second top shield layer, disposed directly on and substantially completely covering a top surface of the second hybrid semiconductor substrate opposite the bottom surface of the second hybrid semiconductor substrate, and second side shield layers substantially completely covering all sides of the second hybrid semiconductor substrate.

17. The package device of claim 16 , wherein a distance between the first self-shielded die and the second self-shielded die is less than about 90 μm.

18. The self-shielded die of claim 1 , wherein the base semiconductor substrate and the lid semiconductor substrate are formed of the same semiconductor material.

19. The self-shielded die of claim 1 , wherein the base semiconductor substrate and the lid semiconductor substrate are formed of different semiconductor materials having approximately the same coefficient of thermal expansion (CTE).

20. The self-shielded die of claim 1 , wherein a portion of the cavity is pre-formed in the base semiconductor substrate and another portion of the cavity is pre-formed in the lid semiconductor substrate, and aligned with the portion of the cavity pre-formed in the base semiconductor substrate.

21. The self-shielded die of claim 1 , wherein the cavity is pre-formed entirely in the base semiconductor substrate.

22. The self-shielded die of claim 1 , wherein the cavity is pre-formed entirely in the lid semiconductor substrate.