IP Library Granted Patent US 10,042,196
Granted Patent B2
US 10,042,196 · App. 15/554,320 · Granted Aug 7, 2018

Display and method for manufacturing display

Inventors: Toshihiko Iwasaka (Kumamoto, JP); Masaru Aoki (Kumamoto, JP); Kazunori Inoue (Kumamoto, JP); Yusuke Yamagata (Kumamoto, JP)
Assignee: Mitsubishi Electric Corporation
G02F1/133345G02F1/13439G02F1/133514G02F1/134309G02F2201/50G02F2202/10H01J37/32431
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Quick Facts
Patent No.
US 10,042,196
App. No.
15/554,320
Granted
Aug 7, 2018
Kind
B2
Abstract

The insulating properties of terminal lines on an array substrate can be maintained without adding any steps for avoiding formation of a counter electrode on the peripheral portion of a color filter substrate. A display includes an insulation film formed to cover an electrode formed on a surface of an array substrate, an oxide semiconductor film formed on a surface of a color filter substrate, and a seal member that is located between the insulation film and the oxide semiconductor film, which face each other, and that bonds the insulation film and the oxide semiconductor film together. An area surrounded by the seal member in plan view is taken as a display area. A portion of the oxide semiconductor film that corresponds to the display area is a conductor, and a portion of the oxide semiconductor film that corresponds to the outside of the display area is an insulator.

Claims (41)

1. A display comprising:

a first substrate;

an electrode formed on a surface of said first substrate;

an insulation film formed to cover said electrode;

a second substrate;

an oxide semiconductor film formed on a surface of said second substrate; and

a seal member that is located between said insulation film and said oxide semiconductor film facing each other and that bonds said insulation film and said oxide semiconductor film together,

wherein an area that is sandwiched between said first substrate and said second substrate and surrounded by said seal member in plan view is taken as a display area, and

a portion of said oxide semiconductor film that corresponds to said display area is a conductor, and a portion of said oxide semiconductor film that corresponds to an outside of said display area is an insulator.

2. The display according to claim 1 , further comprising: a silicon oxide film formed on a surface of the portion of said oxide semiconductor film that corresponds to said display area.

3. The display according to claim 1 , further comprising:

a silicon oxide film formed on a surface of a portion of said second substrate that corresponds to said display area,

wherein said oxide semiconductor film covers said silicon oxide film and is formed on the surface of said second substrate.

4. The display according to claim 1 , wherein

a boundary between the portion of said oxide semiconductor film that is a conductor and the portion of said oxide semiconductor film that is an insulator is located at a surface of said oxide semiconductor film that is in contact with said seal member.

5. The display according to claim 4 , wherein

said boundary between the portion of said oxide semiconductor film that is a conductor and the portion of said oxide semiconductor film that is an insulator is located at an end portion on said display area side out of the surface of said oxide semiconductor film that is in contact with said seal member.

6. The display according to claim 1 , wherein

said oxide semiconductor film is one of InGaZnO-, InZnO-, InGaO-, InSnO-, InSnZnO-, InGaZnSnO-, InAlZnO-, InHfZnO-, InZrZnO-, InMgZnO-, and InYZnO-based oxide semiconductor films, where Hf is hafnium, Zr is zirconium, Mg is magnesium, and Y is yttrium.

7. A method for manufacturing a display, comprising:

forming an electrode on a surface of a first substrate;

forming an insulation film that covers said electrode;

forming an oxide semiconductor film on a surface of a second substrate; and

bonding said insulation film and said oxide semiconductor film with a seal member, said insulation film and said oxide semiconductor film facing each other,

wherein an area that is sandwiched between said first substrate and said second substrate and surrounded by said seal member in plan view is taken as a display area, and

a portion of said oxide semiconductor film that corresponds to said display area is a conductor, and a portion of said oxide semiconductor film that corresponds to an outside of said display area is an insulator.

8. The method for manufacturing a display according to claim 7 , wherein

plasma treatment using gas that contains hydrogen is performed on the portion of said oxide semiconductor film that corresponds to said display area, and

plasma treatment using gas that contains N 2 O is performed on the portion of said oxide semiconductor film that corresponds to the outside of said display area.

9. The method for manufacturing a display according to claim 7 , further comprising:

forming a silicon oxide film on a surface of the portion of said oxide semiconductor film that corresponds to said display area.

10. The method for manufacturing a display according to claim 7 , further comprising:

forming a silicon oxide film on a surface of a portion of said second substrate that corresponds to said display area, and

forming an oxide semiconductor film on a surface of said silicon oxide film and on a surface of said second substrate.

11. The method for manufacturing a display according to claim 9 , further comprising:

performing ultraviolet treatment on the portion of said oxide semiconductor film that corresponds to said display area; and

performing plasma treatment using gas that contains N 2 O on the portion of said oxide semiconductor film that corresponds to the outside of said display area.

12. The method for manufacturing a display according to claim 11 , wherein

said ultraviolet treatment, which is performed on the portion of said oxide semiconductor film that corresponds to said display area, includes applying ultraviolet light having a wavelength of less than or equal to 480 nm.

13. The method for manufacturing a display according to claim 7 , wherein

said oxide semiconductor film is one of InGaZnO-, InZnO-, InGaO-, InSnO-, InSnZnO-, InGaZnSnO-, InAlZnO-, InHfZnO-, InZrZnO-, InMgZnO-, and InYZnO-based oxide semiconductor films, where Hf is hafnium, Zr is zirconium, Mg is magnesium, and Y is yttrium.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2021
From: MITSUBISHI ELECTRIC CORPORATION
To: TRIVALE TECHNOLOGIES
Reel/Frame 057651/0234 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2017
From: IWASAKA, TOSHIHIKO; AOKI, MASARU; INOUE, KAZUNORI; YAMAGATA, YUSUKE
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 043710/0207 →
Priority Claims (1)
JP 2015-132397 · Jul 1, 2015 · national
Continuity (1)
Related Publication 20180052356A1 · Feb 22, 2018