SEMICONDUCTOR DEVICE
There is provided a semiconductor device having LDMOS transistors embedded in a semiconductor substrate to boost source-drain breakdown voltage, with arrangements to prevent fluctuations of element characteristics caused by electric field concentration so that the reliability of the semiconductor device is improved. A trench is formed over the upper surface of a separation insulating film of each LDMOS transistor, the trench having a gate electrode partially embedded therein. This structure prevents electric field concentration in the semiconductor substrate near the source-side edge of the separation insulating film.
1 . A semiconductor device comprising:
a semiconductor substrate;
a source region of a first conductivity type paired with a drain region of the first conductivity type, the source region and the drain region being formed over a principal plane of the semiconductor substrate;
a separation insulating film embedded in an isolation trench formed over the principal plane of the semiconductor substrate between the source region and the drain region;
a gate insulating film formed over the semiconductor substrate between the separation insulating film and the source region;
a gate electrode formed in a manner extending immediately above the gate insulating film and immediately above the separation insulating film between the source region and the drain region;
a drift region of the first conductivity type formed in the semiconductor substrate under the separation insulating film, one edge of the drift region being located immediately under the gate insulating film; and
a trench formed over the upper surface of the separation insulating film, the trench having the gate electrode partially embedded therein;
wherein the interval between the gate electrode and the drain region is longer than the interval between the gate electrode and the source region;
wherein the trench is located away from an edge of the separation insulating film on the side of the source region, the trench being further located away from an edge of the gate electrode on the side of the drain region toward the source side, and
wherein the bottom of the trench is positioned halfway through the depth of the separation insulating film.
2 . The semiconductor device according to claim 1 ,
wherein the depth of the trench is at least one-third of the thickness of the separation insulating film, and
wherein the distance between the bottom of the trench and the semiconductor substrate immediately under the trench is greater than the thickness of the gate insulating film.
3 . The semiconductor device according to claim 1 ,
wherein the distance between the trench and the edge of the separation insulating film on the side of the source region is greater than the thickness of the gate insulating film.
4 . The semiconductor device according to claim 1 ,
wherein a plurality of the trenches are formed over the upper surface of the separation insulating film.
5 . The semiconductor device according to claim 1 ,
wherein the separation insulating film has a structure made of a plurality of layered insulating films, and
wherein the trench reaches the bottommost of the layered insulating films.