IP Library Granted Patent US 10,636,818
Granted Patent B2
US 10,636,818 · App. 15/945,490 · Granted Apr 28, 2020

Semiconductor device and sensor including a single photon avalanche diode (SPAD) structure

Inventor: Claudio Piemonte (Regensburg, DE)
Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
H01L27/1446H01L29/66113H01L31/02005H01L31/028H01L31/02027H01L31/107
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Quick Facts
Patent No.
US 10,636,818
App. No.
15/945,490
Granted
Apr 28, 2020
Kind
B2
Abstract

A semiconductor device, sensor, and array of SPAD cubes are described. One example of the disclosed sensor includes at least one Single Photon Avalanche Diode (SPAD) cube established in a substrate, the at least one SPAD cube including a photosensitive area that is configured to produce an electrical signal in response to light impacting the photosensitive area, where the photosensitive area is positioned at a first side of the at least one SPAD cube, a contact that receives the electrical signal, where the contact is positioned at a second side of the at least one SPAD cube that opposes the first side of the at least one SPAD cube, and at least one trench that spans an entire thickness of the substrate thereby electrically and optically isolating the at least one SPAD cube from adjacent SPAD cubes.

Claims (36)

1. A semiconductor device, comprising:

a silicon substrate having a first side and an opposing second side;

a first Single Photon Avalanche Diode (SPAD) provided in the silicon substrate;

a second SPAD provided in the silicon substrate and also positioned adjacent to the first SPAD;

at least one trench that electrically isolates the first SPAD from the second SPAD by extending from the first side of the silicon substrate to the second side of the silicon substrate, wherein the at least one trench begins at the first side of the silicon substrate and extends through both an n-doped portion of the silicon substrate and a p-doped portion of the silicon substrate all the way through the silicon substrate;

at least one backside contact positioned in proximity to the second side of the silicon substrate, wherein the at least one backside contact receives an electrical signal that is responsive to either the first SPAD or second SPAD receiving a photon; and

an additional contact positioned in proximity to the second side of the silicon substrate, wherein the additional contact is electrically connected to the first side of the silicon substrate by a Through Silicon Via (TSV), and wherein the TSV is isolated from the first SPAD and second SPAD by the at least one trench.

2. The semiconductor device of claim 1 , wherein the silicon substrate comprises a highly doped silicon material.

3. The semiconductor device of claim 1 , further comprising:

a dielectric layer substantially adjacent to the second side of the silicon substrate, wherein the at least one trench extends to and contacts the dielectric layer.

4. The semiconductor device of claim 3 , wherein the at least one backside contact is formed directly on the dielectric layer.

5. The semiconductor device of claim 1 , wherein the at least one backside contact comprises a first contact and a second contact, wherein the first contact receives a first electrical signal from the first SPAD, wherein the second contact receives a second electrical signal from the second SPAD, and wherein the first contact is electrically isolated from the second contact.

6. The semiconductor device of claim 1 , wherein the first SPAD belongs to a first mini-Silicon Photomultiplier (SiPM), wherein the second SPAD belongs to a second mini-SiPM, and wherein the first mini-SiPM is electrically isolated from the second mini-SiPM by the at least one trench.

7. The semiconductor device of claim 6 , wherein the at least one trench comprises a first trench that provides electrical and optical isolation between the first mini-SiPM and the second mini-SiPM and wherein the at least one trench further comprises a second trench that provides single-sided electrical and optical isolation between at least two SPADs belonging to the first mini-SiPM.

8. The semiconductor device of claim 7 , wherein the first trench is longer than the second trench.

9. The semiconductor device of claim 1 , wherein a distance between the first side and the second side is no more than approximately 50 microns.

10. A sensor, comprising:

at least one Single Photon Avalanche Diode (SPAD) cube established in a substrate, the at least one SPAD cube comprising:

a photosensitive area that is configured to produce an electrical signal in response to light impacting the photosensitive area, wherein the photosensitive area is positioned at a first side of the at least one SPAD cube;

a contact that receives the electrical signal, wherein the contact is positioned at a second side of the at least one SPAD cube that opposes the first side of the at least one SPAD cube, wherein a distance from the first side of the at least one SPAD cube to the second side of the at least one SPAD cube is no more than 50 microns;

at least one trench that extends through an entire thickness of the substrate thereby electrically and optically isolating the at least one SPAD cube from adjacent SPAD cubes; and

an additional contact positioned in proximity to the second side of the at least one SPAD cube, wherein the additional contact is electrically connected to the first side of the at least one SPAD cube by a Through Silicon Via (TSV), and wherein the TSV is isolated from the at least one SPAD cube by the at least one trench.

11. The sensor of claim 10 , further comprising:

an external circuit connected to the at least one SPAD cube by the contact.

12. The sensor of claim 11 , wherein the external circuit comprises a contact pad that is electrically and physically connected to the contact of the at least one SPAD cube.

13. The sensor of claim 10 , wherein the electrical signal travels through the substrate and wherein the substrate comprises doped silicon.

14. The sensor of claim 10 , wherein the at least one trench comprises a length that is substantially equal to a thickness of the substrate.

15. The sensor of claim 10 , wherein the at least one trench extends around all four sides of the at least one SPAD cube that connect the first side of the at least one SPAD cube to the second side of the at least one SPAD cube.

16. An array of Single Photon Avalanche Diode (SPAD) cubes, comprising:

a silicon substrate;

an array of photosensitive areas distributed across a first side of the silicon substrate, wherein each photosensitive area in the array of photosensitive areas is capable of producing an electrical signal in response to receiving light;

a plurality of contacts distributed across a second side of the silicon substrate, wherein at least some of the plurality of contacts are configured to receive electrical signals from some of the photosensitive areas and not others of the photosensitive areas;

at least one trench that extends from the first side of the silicon substrate all the way to the second side of the silicon substrate, that provides optical isolation between adjacent photosensitive areas in the array of photosensitive areas, and that provides electrical isolation between adjacent contacts in the plurality of contacts;

a dielectric layer substantially adjacent to the second side of the silicon substrate, wherein the at least one trench extends to and contacts the dielectric layer; and

an additional contact positioned in proximity to the second side of the silicon substrate, wherein the additional contact is electrically connected to the first side of the silicon substrate by a Through Silicon Via (TSV), and wherein the TSV is isolated from the array of photosensitive areas by the at least one trench.

17. The array of SPAD cubes of claim 16 , wherein a length of the at least one trench is substantially equal to a thickness of the silicon substrate and wherein the thickness of the silicon substrate is no more than approximately 50 microns.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER AND APPLICATION NOS. 13/237,550 AND 16/103,107 FROM THE MERGER PREVIOUSLY RECORDED ON REEL 047231 FRAME 0369. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048549/0113 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047231/0369 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2018
From: PIEMONTE, CLAUDIO
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 045523/0861 →
Continuity (1)
Related Publication 20190312070A1 · Oct 10, 2019