IP Library › Granted Patent US 10,418,328
Granted Patent B2
US 10,418,328 · App. 16/033,962 · Granted Sep 17, 2019

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 10,418,328
App. No.
16/033,962
Granted
Sep 17, 2019
Kind
B2
Abstract

An upper surface of a plug (PL 1 ) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate ( 1 S), completing a CMP method for forming the plug (PL 1 ) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL 1 ) and a wiring (W 1 ) in a vertical direction can be ensured. Also, the wiring (W 1 ) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.

Claims (33)

1. A semiconductor device comprising;

a semiconductor substrate;

a first insulating film formed over a main surface of the semiconductor substrate;

a second insulating film formed over the first insulating film;

a first conductor formed in the first insulating film; and

a second conductor formed in the second insulating film,

wherein a part of an upper surface of the first conductor is connected to the second conductor in the second insulating film,

wherein a part of a side surface of the first conductor is connected to the second conductor in the first insulating film and the second insulating film, and

wherein a dielectric constant of the second insulating film is lower than a dielectric constant of the first insulating film.

2. The semiconductor device according to claim 1 ,

wherein an upper surface of the first conductor is located in the second insulating film.

3. The semiconductor device according to claim 1 ,

wherein an upper surface of the first conductor is formed higher than an upper surface of the first insulating film.

4. The semiconductor device according to claim 1 ,

wherein the part of the upper surface of the first conductor is connected to a part of a bottom surface of the second conductor in the second insulating film.

5. The semiconductor device according to claim 1 ,

wherein an entirety of the second conductor is formed in the second insulating film.

6. The semiconductor device according to claim 1 ,

wherein the second conductor is not formed in the first insulating film.

7. The semiconductor device according to claim 1 ,

wherein a dielectric constant of the second insulating film is lower than a dielectric constant of a silicon oxide.

8. The semiconductor device according to claim 1 ,

wherein the first conductor is formed so as to penetrate through the first insulating film,

wherein the second conductor is formed so as to be embedded a trench formed in the second insulating film, and

wherein the second conductor contains copper.

9. The semiconductor device according to claim 1 ,

wherein the second insulating film is formed as a single layer.

10. The semiconductor device according to claim 1 ,

wherein the second insulating film consists of two insulating films that are stacked and overlapped with each other.

11. The semiconductor device according to claim 1 ,

wherein the second insulating film extends over an entire horizontal surface of the first insulating film.

12. The semiconductor device according to claim 1 ,

wherein the first conductor is electrically connected with the second conductor.