Hardware control system and hardware control method
A hardware control system and a hardware control method are provided. The hardware control system is for controlling a function circuit, and includes a first transformation circuit, a second transformation circuit and an analysis circuit. The first transformation circuit transforms a command from an operating system to an intermediate address. The second transformation circuit transforms the intermediate address to a permission physical address according to an identifier of the operating system, wherein the permission physical address consists of a hardware physical address and a permission value. The analysis circuit analyzes the permission physical address to generate the hardware physical address and the permission value, and determines a control value corresponding to the hardware physical address according to the permission value. The control value is for permitting the operating system to control the function circuit.
1. A hardware control method for controlling a function circuit, the hardware control method comprising:
transforming a command from an operating system to an intermediate address;
transforming the intermediate address to a permission physical address according to an identifier of the operating system, wherein the permission physical address consists of a hardware physical address and a permission value; and the identifier indicates which operating system is currently operating;
analyzing the permission physical address to generate the hardware physical address and the permission value;
determining a control value corresponding to the hardware physical address according to the permission value; and
permitting, according to the control value, the operating system to control the function circuit.
2. The hardware control method according to claim 1 , wherein the step of transforming the command from the operating system to the intermediate address is performed according to a first look-up table.
3. The hardware control method according to claim 1 , wherein the step of transforming the intermediate address to the permission physical address according to the identifier of the operating system is performed according to a second look-up table.
4. The hardware control method according to claim 1 , wherein the step of determining the control value corresponding to the hardware physical address according to the permission value is performed according to a third look-up table.
5. The hardware control method according to claim 1 , wherein the control value represents a state of a function circuit controller corresponding to the hardware physical address, and the function circuit controller is for controlling whether at least a part of functions of the function circuit is permitted to be operated.
6. The hardware control method according to claim 1 , further comprising:
determining, according to the permission value, whether a memory address corresponding to the function circuit is permitted to be enabled.
7. The hardware control method according to claim 6 , wherein the step of determining whether the memory address corresponding to the function circuit is permitted to be enabled is performed according to a fourth look-up table.
8. The hardware control method according to claim 6 , wherein the step of determining whether the memory address corresponding to the function circuit is permitted to be enabled further comprises:
determining, according to the permission value, whether the memory address corresponding to the function circuit is permitted to be read; and
determining, according to the permission value, whether the memory address corresponding to the function circuit is permitted to be written.
9. The hardware control method according to claim 6 , further comprising:
temporarily storing the permission value; and
determining whether the memory address corresponding to the function circuit corresponds to the permission value.
10. A hardware control system, for controlling a function circuit, the hardware control system comprising:
a first transformation circuit, transforming a command from an operating system to an intermediate address;
a second transformation circuit, transforming the intermediate address to a permission physical address according to an identifier of the operating system, wherein the permission physical address consists of a hardware physical address and a permission value; and the identifier indicates which operating system is currently operating; and
an analysis circuit, analyzing the permission physical address to generate the hardware physical address and the permission value, and determining a control value corresponding to the hardware physical address according to the permission value, wherein the control value is for permitting the operating system to control the function circuit.
11. The hardware control system according to claim 10 , wherein the first transformation circuit transforms the command from the operating system to the intermediate address by looking up a first look-up table.
12. The hardware control system according to claim 10 , wherein the second transformation circuit transforms the intermediate address to the permission physical address according to the identifier of the operating system by looking up a second look-up table.
13. The hardware control system according to claim 10 , wherein the analysis circuit comprises:
a first inspector, looking up a third look-up table to determine the control value corresponding to the hardware physical address according to the permission value.
14. The hardware control system according to claim 10 , wherein the control value represents a state of a function circuit controller corresponding to the hardware physical address, wherein the function circuit controller is for controlling whether at least a part of functions of the function circuit is permitted to be operated.
15. The hardware control system according to claim 10 , wherein the analysis circuit comprises:
a second inspector, determining, according to the permission value, whether a memory address corresponding to the function circuit is permitted to be enabled.
16. The hardware control system according to claim 15 , wherein the second inspector determines whether the memory address corresponding to the function circuit is permitted to be enabled by looking up a fourth look-up table.
17. The hardware control system according to claim 15 , wherein the second inspector further temporarily stores the permission value, and determines whether the memory address corresponding to the function circuit corresponds to the permission value when receiving the memory address corresponding to the function circuit from the function circuit.
18. The hardware control system according to claim 15 , wherein the second inspector receives the permission value and the memory address corresponding to the function circuit from the function circuit.
19. The hardware control system according to claim 13 , wherein the analysis circuit further comprises:
a second inspector, determining, according to the permission value, whether a memory address corresponding to the function circuit is permitted to be enabled.
20. The hardware control system according to claim 19 , wherein the second inspector determines, according to the permission value, whether the memory address corresponding to the function circuit is permitted to be read, and whether the memory address corresponding to the function circuit is permitted to be written.