ON-WAFER TESTING OF PHOTONIC CHIPS
A method for on-wafer testing of optical structures of photonic chips that include edge couplers as input/out ports includes defining, in test a test area of the wafer, an edge coupler pair formed of two edge couplers separated by a test gap, which may have a width that is close to the width of a chip-fiber gap during normal operation of the photonic chips. Test areas may include chains of different numbers of the edge coupler pairs for determining coupling loss per edge coupler.
1 . A photonic wafer comprising:
a substrate;
an optical layer supported by the substrate;
a plurality of photonics chips defined upon the substrate so as to be spaced apart from each other, each photonic chip comprising an optical device and an edge coupler that are defined at least in part in the optical layer, wherein the edge coupler is configured to be used for coupling light in or out of the optical device when the photonic chip is separated from the wafer; and,
a first test structure[[s]] defined at least in part in the optical layer, the first test structure comprising one or more edge coupler pairs (ECPs), each of the one or more ECPs comprising two test edge couplers optically coupled across a test gap, wherein the test gap separates the two test edge couplers by a distance that is at most half of an edge-to-edge spacing between adjacent photonic chips, and wherein neither of the two test edge couplers is configured to be used as an edge coupler of a photonic chip after the photonic chips are separated from the photonic wafer.
2 . The photonic wafer of claim 1 wherein at least one of the two test edge couplers is substantially identical in structure to the edge couplers of the photonic chips.
3 . The photonic wafer of claim 1 wherein the first test structure comprises an input test port, an output test port, and a plurality of the ECPs optically connected in series between the input test port and the output test port in the absence of optical components therebetween other than waveguide interconnects.
4 . The photonic wafer of claim 3 wherein at least one of the input and output test ports comprises a grating coupler.
5 . The photonic wafer of claim 1 comprising a plurality of the first test structures that are disposed in a plurality of test areas spread across the substrate.
6 . The photonic wafer of claim 3 further including a second test structure comprising an input test port, an output test port, and a plurality of the ECPs optically connected in series between the input test port and the output test port of the second test structure in the absence of optical components therebetween other than waveguide interconnects, wherein the number of the ECPs in the second test structure differs from the number of the ECPs in the first test structure.
7 . The photonic wafer of claim 1 wherein the one or more ECPs comprise a first ECP, and wherein the first test structure comprises:
a test instance of the optical device optically connected to a first test edge coupler of the two test edge couplers of the first ECP; and,
an input test port for coupling test light into a second edge coupler of the two edge couplers of the first ECP for propagating through the test gap of the first ECP into the edge coupler of the test instance of the optical device.
8 . The photonic wafer of claim 1 wherein the edge-to-edge spacing separating adjacent photonic chips is at least 50 microns wide and the test gap is at most 10 microns wide.
9 . A photonic wafer comprising:
a substrate;
an optical layer supported by the substrate;
a plurality of photonics chips defined upon the substrate so as to be spaced apart from each other, each photonic chip comprising an edge coupler that is defined at least in part in the optical layer and configured to be used for coupling light into or out of the photonic chip when the photonic chip is separated from the wafer; and,
one or more test structures defined at least in part in the optical layer, each comprising one or more edge coupler pairs (ECPs), each of the one or more ECPs comprising two test edge couplers optically coupled across a test gap, wherein the test gap separates the two test edge couplers by a distance that is at most half of an edge-to-edge spacing between adjacent photonic chips;
wherein the edge couplers of the photonic chips and at least one of the test edge couplers of the one or more ECPs comprise each a center waveguide taper disposed between two guard stripes configured to shield the center waveguide taper from the rest of the chip.
10 . The photonic wafer of claim 9 wherein the guard stripes are shaped as inverted tapers that widen towards a coupling end of the edge coupler.
11 . The photonic wafer of claim 9 wherein the guard stripes fan out towards a coupling end of the edge coupler.
12 . The A photonic wafer of claim 1 comprising:
a substrate;
an optical layer supported by the substrate;
a plurality of photonics chips defined upon the substrate so as to be spaced apart from each other, each photonic chip comprising an edge coupler that is defined at least in part in the optical layer and configured to be used for coupling light into or out of the photonic chip when the photonic chip is separated from the wafer; and,
one or more test structures defined at least in part in the optical layer, each comprising one or more edge coupler pairs (ECPs), each of the one or more ECPs comprising two test edge couplers optically coupled across a test gap, wherein the test gap separates the two test edge couplers by a distance that is at most half of an edge-to-edge spacing between adjacent photonic chips;
wherein the test gap widens away from an optical axis of the edge coupler pair so as to at least partially collimate or focus light propagating between the two test edge couplers thereof.
13 . The photonic wafer of claim 1 wherein the edge couplers of the photonic chips are configured for butt coupling to an optical waveguide after the photonics chips are separated from the photonic wafer, and wherein the width of the test gap is substantially equal to a nominal distance between the photonic chip and the optical waveguide in the butt coupling.
14 - 18 . (canceled)
19 . The photonic wafer of claim 1 , wherein the first test structure is disposed in a test area separate from the photonics chips.
20 . The photonic wafer of claim 1 wherein the first test structure is optically decoupled from the photonic chips.