IP Library Patent Application 16045808
Patent Application
App. No. 16/045,808

MEMORY CONTROL DEVICE AND MEMORY CONTROL METHOD

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Quick Facts
Patent No.
US None
App. No.
16/045,808
Abstract

A memory control device and a memory control method. The memory control method includes: receiving a physical address of a memory from a function circuit; searching a lookup table according to the physical address to determine a range identifier; searching a permission lookup table according to a device identifier corresponding to the function circuit and the range identifier to determine an operation permission of the function circuit for operating the physical address of the memory.

Claims (42)

1 . A memory control method, comprising:

receiving a physical address of a memory from a function circuit;

searching a range lookup table according to the physical address to determine a range identifier; and

searching a permission lookup table according to a device identifier corresponding to the function circuit and the range identifier to determine an operation permission of the function circuit for operating the physical address of the memory.

2 . The memory control method according to claim 1 , wherein the range identifier corresponds to an interval of the memory.

3 . The memory control method according to claim 1 , wherein the operation permission includes at least one of a read permission and a write permission.

4 . The memory control method according to claim 1 , wherein the step of searching the range lookup table comprises:

converting the physical address to a range index, which corresponds to a range of one page of the memory; and

searching the range lookup table according to the range index to determine the range identifier.

5 . The memory control method according to claim 1 , further comprising:

searching a screening lookup table according to the physical address to determine to which one of a full access permission and a partial access permission the physical address corresponds, and performing the step of searching the range lookup table according to the physical address to obtain the range identifier if the physical address corresponds to the partial access permission.

6 . The memory control method according to claim 5 , wherein the step of searching the screening lookup table according to the physical address to determine to which one of the full access permission and the partial access permission the physical address corresponds comprises:

converting the physical address to a classification index, which corresponds to a memory range of a predetermined size; and

searching the screening lookup table according to the classification index to find to which one of the full access permission and the partial access permission the physical address corresponds.

7 . The memory control method according to claim 1 , further comprising:

receiving a secure environment indication signal from the function circuit, wherein the function circuit is a processor;

determining whether the function circuit is in a secure environment mode according to the secure environment indication signal; and

if the function circuit is in the secure environment mode, the function circuit directly operating the physical address of the memory.

8 . The memory control method according to claim 1 , wherein the secure environment indication signal is a non-secure bit.

9 . A memory control device, comprising:

a range processing circuit, receiving a physical address of a memory from a function circuit, and searching a range lookup table according to the physical address to obtain a range identifier; and

a permission processing circuit, searching a permission lookup table according to a device identifier corresponding to the function circuit and the range identifier to determine an operation permission of the function circuit for operating the physical address of the memory.

10 . The memory control device according to claim 9 , wherein the range identifier corresponds to an interval of the memory.

11 . The memory control device according to claim 9 , wherein the operation permission includes at least one of a read permission and a write permission.

12 . The memory control device according to claim 9 , wherein the range processing circuit comprises:

a range indexer, converting the physical address to a range index, which corresponds to a range of one page of the memory; and

a range inquirer, searching the range lookup table according to the range index to determine the range identifier.

13 . The memory control device according to claim 9 , further comprising:

a screening circuit, coupled between the function circuit and the range processing circuit, searching a screening lookup table according to the physical address to determine to which one of a full access permission and a partial access permission the physical address corresponds, and transmitting the physical address to the range processing circuit if the physical address corresponds to the partial access permission.

14 . The memory control device according to claim 13 , wherein the screening circuit comprises:

a classification indexer, converting the physical address to a classification index, which corresponds to a memory range of a predetermined size; and

a permission inquirer, searching the screening lookup table according to the classification index to determine to which one of the full access permission and the partial access permission the physical address corresponds.

15 . The memory control device according to claim 9 , further comprising:

a secure environment determining circuit, receiving a secure environment indication signal from the function circuit, wherein the function circuit is a processor, the secure environment determining circuit determining whether the function circuit is in a secure environment mode according to the secure environment indication signal, and the function circuit directly operating the physical address of the memory if the function circuit is in the secure environment mode.

16 . The memory control device according to claim 15 , wherein the secure environment indication signal is a non-secure bit.

17 . A memory control device, comprising:

a secure environment determining circuit, receiving a physical address of a memory from a function circuit, and receiving a secure environment indication signal from the function circuit, wherein the function circuit is a processor, the secure environment determining circuit further determining whether the processor is in a secure environment mode according to the secure environment indication signal, wherein the function circuit directly operates the physical address of the memory if the processor is in the secure environment mode; and

a permission processing circuit, if the function circuit is not in the secure environment mode, the permission processing circuit determining an operation permission of the function circuit for operating the physical address of the memory, wherein the function circuit operates the physical address of the memory according to the operation permission.

18 . The memory control device according to claim 17 , wherein the secure environment indication signal is a non-secure bit.

19 . The memory control device according to claim 17 , further comprising:

a range processing circuit, searching a range lookup table according to the physical address to determine a range identifier;

wherein, the permission processing circuit searches a permission lookup table according to a device identifier corresponding to the function circuit and the range identifier to determine the operation permission of the function circuit for operating the physical address of the memory.

Assignments (2)
MERGER Recorded Oct 8, 2019
From: MSTAR SEMICONDUCTOR, INC.
To: MEDIATEK INC.
Reel/Frame 050665/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2018
From: HUANG, CHIEN-HSING
To: MSTAR SEMICONDUCTOR, INC.
Reel/Frame 046494/0485 →