IP Library Granted Patent US 10,651,305
Granted Patent B2
US 10,651,305 · App. 16/045,960 · Granted May 12, 2020

Compound semiconductor device with quantum well structure, power supply device, and high-frequency amplifier

Inventors: Junji Kotani (Atsugi, JP); Norikazu Nakamura (Sagamihara, JP); Hisao Shigematsu (Zama, JP)
Assignee: FUJITSU LIMITED
H01L29/7783H01L21/02178H01L21/02271H01L21/28575H01L29/1029H01L29/155H01L29/205H01L29/401H01L29/452H01L29/4958H01L29/66462H02M1/4208H03F1/3205H03F1/3241H03F1/3247H03F3/193H03F3/195H03F3/21H03F3/245H01L21/0254H01L21/0262H01L21/02458H01L21/02576H01L21/246H01L21/28264H01L29/0843H01L29/2003H01L29/36H02M1/4225H02M3/33576H02M2001/007
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Quick Facts
Patent No.
US 10,651,305
App. No.
16/045,960
Granted
May 12, 2020
Kind
B2
Abstract

A compound semiconductor device includes a substrate, a compound semiconductor layer formed over the substrate, a channel layer formed over the compound semiconductor layer, an electron supply layer formed over the channel layer, and a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer. A quantum well structure is formed by the compound semiconductor layer, the channel layer, and the electron supply layer.

Claims (51)

1. A compound semiconductor device, comprising:

a substrate;

a buffer layer that is a compound semiconductor layer formed over the substrate;

a channel layer formed over the buffer layer;

an electron supply layer formed over the channel layer; and

a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer, wherein

a quantum well structure is formed by the buffer layer, the channel layer, and the electron supply layer; and

an energy difference between a ground level and a second excited level of an electron in the channel layer is greater than an optical phonon energy of the channel layer.

2. The compound semiconductor device as claimed in claim 1 , wherein the energy difference between the ground level and the second excited level of the electron in the channel layer is less than an energy difference between a point L and a point Γ in a subband corresponding to the ground level.

3. The compound semiconductor device as claimed in claim 1 , wherein a surface layer of the buffer layer is doped with a donor impurity.

4. The compound semiconductor device as claimed in claim 1 , wherein

the channel layer includes

a lower layer formed on the buffer layer,

a middle layer formed on the lower layer, and

an upper layer formed on the middle layer; and

electron affinities of the lower layer and the upper layer are smaller than an electron affinity of the middle layer.

5. The compound semiconductor device as claimed in claim 4 , wherein

the middle layer is a GaN layer; and

the lower layer and the upper layer are AlGaN layers.

6. The compound semiconductor device as claimed in claim 1 , wherein

the channel layer includes multiple well layers that are stacked on each other and have band gaps with different widths; and

the well layers are arranged in ascending order of the widths of the band gaps in a direction toward the substrate.

7. The compound semiconductor device as claimed in claim 6 , wherein

the well layers include at least one upper well layer and two or more lower well layers, the lower well layers being closer to the substrate than the upper well layer;

the lower well layers are AlGaN layers having different composition ratios of Al; and

the AlGaN layers are arranged in ascending order of the composition ratios of Al in the direction toward the substrate.

8. The compound semiconductor device as claimed in claim 6 , wherein

the well layers include at least one upper well layer and two or more lower well layers, the lower well layers being closer to the substrate than the upper well layer;

the lower well layers are InGaN layers having different composition ratios of In; and

the InGaN layers are arranged in descending order of the composition ratios of In in the direction toward the substrate.

9. The compound semiconductor device as claimed in claim 1 , wherein a thickness of the channel layer is less than or equal to 15 nm.

10. The compound semiconductor device as claimed in claim 1 , wherein a surface roughness of the buffer layer is less than or equal to 0.4 nm.

11. The compound semiconductor device as claimed in claim 1 , wherein each of the buffer layer, the channel layer, and the electron supply layer is comprised of a nitride semiconductor.

12. A power supply device, comprising:

a compound semiconductor device that includes

a substrate,

a buffer layer that is a compound semiconductor layer formed over the substrate,

a channel layer formed over the buffer layer,

an electron supply layer formed over the channel layer, and

a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer, wherein

a quantum well structure is formed by the buffer layer, the channel layer, and the electron supply layer; and

an energy difference between a ground level and a second excited level of an electron in the channel layer is greater than an optical phonon energy of the channel layer.

13. A high-frequency amplifier, comprising:

a compound semiconductor device that includes

a substrate,

a buffer layer that is a compound semiconductor layer formed over the substrate,

a channel layer formed over the buffer layer,

an electron supply layer formed over the channel layer, and

a source electrode, a drain electrode, and a gate electrode that are formed apart from each other over the electron supply layer,

wherein a quantum well structure is formed by the buffer layer, the channel layer, and the electron supply layer; and

an energy difference between a ground level and a second excited level of an electron in the channel layer is greater than an optical phonon energy of the channel layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2025
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 073964/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2024
From: FUJITSU LIMITED
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 069454/0333 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2018
From: KOTANI, JUNJI; NAKAMURA, NORIKAZU; SHIGEMATSU, HISAO
To: FUJITSU LIMITED
Reel/Frame 046634/0206 →
Priority Claims (1)
JP 2017-151728 · Aug 4, 2017 · national
Continuity (1)
Related Publication 20190043976A1 · Feb 7, 2019