Semiconductor device and semiconductor device manufacturing method

1. A semiconductor device comprising:

a channel layer formed above a substrate, the channel layer containing GaN;

a barrier layer formed above the channel layer, the barrier layer containing In x1 Al y1 Ga 1-x1-y1 N (0.00≤x1≤0.20, 0.60≤y1≤1.00);

a spacer layer containing Al x3 Ga 1-x3 N (0.30≤x3≤1.00) between the channel layer and the barrier layer;

an intermediate layer formed on the barrier layer, the intermediate layer containing In x2 Al y2 Ga 1-x2-y2 N (0.00≤x2<0.04, 0.30≤y2≤0.60);

a cap layer formed on the intermediate layer, the cap layer containing GaN and having a thickness of not more than 3 nm; and

a gate electrode formed on the cap layer.

2. The semiconductor device according to claim 1 , further comprising

a contact layer containing n-type GaN;

a source electrode formed on the contact layer; and

a drain electrode formed on the contact layer, wherein

the contact layer is in contact with the channel layer by penetrating through the cap layer, the intermediate layer, and the barrier layer.

3. The semiconductor device according to claim 1 , wherein a thickness of the spacer layer is not more than 2 nm.

4. The semiconductor device according to claim 1 , further comprising

a contact layer containing n-type GaN;

a source electrode formed on the contact layer; and

a drain electrode formed on the contact layer, wherein

the contact layer is in contact with the channel layer by penetrating through the cap layer, the intermediate layer, the barrier layer, and the spacer layer.

5. The semiconductor device according to claim 1 , wherein composition of the barrier layer and composition of the intermediate layer are same.

6. A method of manufacturing a semiconductor device comprising:

forming, above a substrate, a channel layer containing GaN;

forming, on the channel layer, a spacer layer containing Al x3 Ga 1-x3 N (0.30≤x3≤1.00);

forming, on the spacer layer, a barrier layer containing In x1 Al y1 Ga 1-x1-y1 N (0.00≤x1≤0.20, 0.60≤y1≤1.00);

forming, on the barrier layer, an intermediate layer containing In x2 Al y2 Ga 1-x2-y2 N (0.00≤x2<0.04, 0.30≤y2≤0.60);

forming, on the intermediate layer, a cap layer containing GaN and having a thickness of not more than 3 nm; and

forming a gate electrode on the cap layer.

7. The method according to claim 6 , further comprising

removing, after the forming of the cap layer, a part of the cap layer, a part of the intermediate layer, a part of the barrier layer, and a part of the channel layer;

forming a contact layer containing n-type GaN, such that the contact layer is in contact with the channel layer by penetrating through the cap layer, the intermediate layer, and the barrier layer; and

forming a source electrode and a drain electrode on the contact layer.

8. The method according to claim 6 , wherein a thickness of the spacer layer is not more than 2 nm.

9. The method according to claim 6 , further comprising

removing, after the forming of the cap layer, a part of the cap layer, a part of the intermediate layer, a part of the barrier layer, a part of the spacer layer, and a part of the channel layer;

forming a contact layer containing n-type GaN, such that the contact layer is in contact with the channel layer by penetrating through the cap layer, the intermediate layer, the barrier layer, and the spacer layer; and

forming a source electrode and a drain electrode on the contact layer.

10. The method according to claim 6 , wherein a thickness of the cap layer is not more than 3 nm.

11. The method according to claim 6 , wherein composition of the barrier layer and composition of the intermediate layer are same.