IP Library Patent Application 16476343
Patent Application
App. No. 16/476,343

THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR MANUFACTURING SAME

Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US None
App. No.
16/476,343
Abstract

The purpose of the present invention is to provide a technique with which it is possible to suppress light having a harmful wavelength from reaching an active layer. A thin film transistor substrate includes: an active layer which is disposed on a gate insulating film, overlaps with a gate electrode in plan view, and contains an oxide semiconductor; a source electrode and a drain electrode, each connected to the active layer; a protective insulating film disposed on the active layer, the source electrode, and the drain electrode; and a pixel electrode disposed on an insulating film that includes the gate insulating film or the gate insulating film and the protective insulating film, and above the absorption layer, the pixel electrode being connected to the drain electrode.

Claims (29)

1 . A thin film transistor substrate comprising:

a substrate;

a gate electrode disposed on the substrate;

an absorption layer disposed on the substrate so as to be separated from the gate electrode and containing an oxide semiconductor;

a gate insulating film disposed on the gate electrode and the absorption layer;

an active layer disposed on the gate insulating film, overlapping with the gate electrode in plan view, and containing an oxide semiconductor;

a source electrode and a drain electrode, each connected to the active layer;

a protective insulating film disposed on the active layer, the source electrode, and the drain electrode; and

a pixel electrode disposed on an insulating film that includes the gate insulating film or the gate insulating film and the protective insulating film, and above the absorption layer, the pixel electrode being connected to the drain electrode.

2 . The thin film transistor substrate according to claim 1 , wherein the insulating film includes the gate insulating film without including the protective insulating film.

3 . The thin film transistor substrate according to claim 1 , wherein the pixel electrode has a comb shape or a slit shape.

4 . The thin film transistor substrate according to claim 1 , wherein the absorption layer contains a metal element same as a metal element of the active layer.

5 . The thin film transistor substrate according to claim 4 ,

wherein a metal composition ratio of the metal element in the absorption layer is identical to a metal composition ratio of the metal element in the active layer, and

a content of hydrogen in the absorption layer is greater than a content of hydrogen in the active layer.

6 . The thin film transistor substrate according to claim 5 , wherein a content of oxygen in the absorption layer is greater than a content of oxygen in the active layer.

7 . The thin film transistor substrate according to claim 4 , wherein the absorption layer is formed with one or more holes in plan view.

8 . A method for manufacturing a thin film transistor substrate, the method comprising:

forming a gate electrode on a substrate;

forming an absorption layer that is disposed on the substrate so as to be separated from the gate electrode and contains an oxide semiconductor;

forming a gate insulating film disposed on the gate electrode and the absorption layer;

forming an active layer that is disposed on the gate insulating film, overlaps with the gate electrode in plan view, and contains an oxide semiconductor;

forming a source electrode and a drain electrode, each connected to the active layer;

forming a protective insulating film disposed on the active layer, the source electrode, and the drain electrode; and

forming a pixel electrode disposed on an insulating film that includes the gate insulating film or the gate insulating film and the protective insulating film, and above the absorption layer, the pixel electrode being connected to the drain electrode.

9 . The method for manufacturing a thin film transistor substrate according to claim 8 , wherein the pixel electrode has a comb shape or a slit shape.

10 . The method for manufacturing a thin film transistor substrate according to claim 8 , wherein the absorption layer is formed by a sputtering method using a target that is same in metal element composition ratio as a target used for forming the active layer.

11 . The method for manufacturing a thin film transistor substrate according to claim 10 , wherein the absorption layer is formed under a state where a water partial pressure is higher than a water partial pressure during formation of the active layer.

12 . The method for manufacturing a thin film transistor substrate according to claim 11 , wherein the absorption layer is formed under a state where an oxygen partial pressure is higher than an oxygen partial pressure during formation of the active layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2021
From: MITSUBISHI ELECTRIC CORPORATION
To: TRIVALE TECHNOLOGIES
Reel/Frame 057651/0234 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2019
From: FURUHATA, TAKEO; FUJINO, TOSHIAKI; INOUE, KAZUNORI
To: MITSUBISHI ELECTRIC CORPORATION
Reel/Frame 049685/0931 →