IP Library Granted Patent US 10,826,376
Granted Patent B1
US 10,826,376 · App. 16/674,505 · Granted Nov 3, 2020

Switch controller and compensation method of valley detection error

Inventors: JooHoon Kim (Bucheon, KR); Jintae Kim (Seongnam-si, KR); Jihoon Jang (Incheon, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02M1/08H02M3/33523
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Quick Facts
Patent No.
US 10,826,376
App. No.
16/674,505
Granted
Nov 3, 2020
Kind
B1
Abstract

A method operates a switch controller of a power switch. The method includes determining a compensation value based on a quarter period of a resonant cycle of a drain voltage and a propagation delay time, the drain voltage being a voltage at a drain of the power switch, generating a sensing signal based on detection of a valley point of the drain voltage, and generating a control signal for controlling the power switch based on the sensing signal and the compensation value to turn on the power switch at a time corresponding to the valley point of the drain voltage.

Claims (64)

1. A method for operating a switch controller, the method comprising:

determining a compensation value based on a quarter period of a resonant cycle of a drain voltage and a propagation delay time, the drain voltage being a voltage at a drain of a power switch;

generating a sensing signal based on detection of a valley point of the drain voltage; and

generating a control signal for controlling the power switch based on the sensing signal and the compensation value to turn on the power switch at a time corresponding to the valley point of the drain voltage.

2. The method of claim 1 , further comprising:

measuring the quarter period of the resonant cycle when a first valley point of the drain voltage is detected after the switch controller is installed; and

measuring the propagation delay time occurring in the switch controller,

wherein the compensation value is determined by calculating a difference between the quarter period and the propagation delay time.

3. The method of claim 2 , further comprising:

determining, as the propagation delay time, a phase difference between a pulse width modulation (PWM) output signal and the control signal, the control signal being generated based on the PWM output signal.

4. The method of claim 3 , wherein the quarter period is measured by counting a pulse width of the sensing signal, and the propagation delay time is measured by counting the phase difference between the PWM output signal and the control signal.

5. The method of claim 4 , wherein the quarter period is determined when a pulse of the sensing signal does not overlap a pulse of the PWM output signal.

6. The method of claim 1 , further comprising:

generating a current signal by sensing the drain voltage using a capacitor, the current signal having a sinusoidal waveform;

generating a regulated voltage signal by regulating the current signal; and

generating the sensing signal based on the regulated voltage signal.

7. The method of claim 6 , further comprising:

comparing the regulated voltage signal with an offset voltage to generate a comparison signal; and

selecting one of pulses of the comparison signal as the sensing signal when two or more valley points are detected and the pulses of the comparison signal correspond to the two or more valley points,

wherein the sensing signal has a pulse width corresponding to the quarter period.

8. The method of claim 1 , further comprising:

generating a compensated sensing signal based on the sensing signal and the compensation value, the compensated sensing signal having a first edge synchronized with a first edge of the sensing signal, and a second edge determined after a time period corresponding to the compensation value passes from the first edge of the compensated sensing signal;

generating a first edge of a PWM output signal that is synchronized with the second edge of the compensated sensing signal; and

generating the control signal having a first edge that is delayed for the propagation delay time from the first edge of the PWM output signal,

wherein the power switch is turned on in response to the first edge of the control signal.

9. A switch controller, comprising:

a detection circuit configured to determine a compensation value based on a quarter period of a resonant cycle of a drain voltage and a propagation delay time, generate a sensing signal based on detection of a valley point of the drain voltage, and generate a compensated sensing signal based on the sensing signal and the compensation value, the drain voltage being a voltage at a drain of a power switch; and

a control circuit configured to generate a control signal for controlling the power switch based on the compensated sensing signal to turn on the power switch at a time corresponding to the valley point of the drain voltage.

10. The switch controller of claim 9 , wherein the detection circuit comprises:

a detection block configured to generate the sensing signal based on the detection of the valley point of the drain voltage; and

a compensation block configured to measure the quarter period based on the sensing signal, measure the propagation delay time occurring in the control circuit, determine the compensation value based on the quarter period and the propagation delay time, and generate the compensated sensing signal based on the sensing signal and the compensation value.

11. The switch controller of claim 10 , wherein the compensation block comprises:

a counter configured to generate a clock signal to measure the quarter period, the propagation delay time, the compensation value, a pulse width of the sensing signal; and

a register array configured to store the quarter period, the propagation delay time, the compensation value.

12. The switch controller of claim 10 , wherein the detection block comprises:

a differentiator configured to sense the drain voltage and generate a current signal having a sinusoidal waveform;

a voltage regulator configured to regulate the current signal and generate a regulated voltage signal; and

a voltage generator configured to convert the regulated voltage signal into the sensing signal having a pulse corresponding to the quarter period.

13. The switch controller of claim 12 , wherein the voltage generator comprises:

a comparator configured to compare the regulated voltage signal with an offset voltage and output a comparison signal; and

a screener configured to generate a screening signal to pass a pulse of the comparison signal as the sensing signal, the pulse of the comparison signal corresponding to one of valley points detected while the drain voltage resonates.

14. The switch controller of claim 12 , wherein the differentiator comprises a high voltage capacitor coupled between the drain of the power switch and the voltage regulator.

15. The switch controller of claim 9 , wherein the control circuit comprises:

a PWM controller configured to generate a PWM control signal for controlling a pulse width of the control signal based on the compensated sensing signal and a switch turn-off control signal; and

a gate driver configured to generate the control signal based on the PWM control signal.

16. A power converter, comprising:

a transformer including a primary winding and a secondary winding;

a power switch including a drain coupled to the primary winding; and

a switch controller, comprising:

a detection circuit configured to determine a compensation value based on a quarter period of a resonant cycle of a drain voltage and a propagation delay time, generate a sensing signal based on detection of a valley point of the drain voltage, and generate a compensated sensing signal based on the sensing signal and the compensation value, the drain voltage being a voltage at a drain of the power switch; and

a control circuit configured to generate a control signal for controlling the power switch based on the compensated sensing signal to turn on the power switch at a time corresponding to the valley point of the drain voltage.

17. The power converter of claim 16 , wherein the detection circuit comprises:

a detection block configured to generate the sensing signal based on the detection of the valley point of the drain voltage; and

a compensation block configured to measure the quarter period based on the sensing signal, measure the propagation delay time occurring in the control circuit, determine the compensation value based on the quarter period and the propagation delay time, and generate the compensated sensing signal based on the sensing signal and the compensation value.

18. The power converter of claim 17 , wherein the detection block comprises:

a differentiator configured to sense the drain voltage and generate a current signal having a sinusoidal waveform;

a voltage regulator configured to regulate the current signal and generate a regulated voltage signal; and

a voltage generator configured to convert the regulated voltage signal into the sensing signal having a pulse corresponding to the quarter period.

19. The power converter of claim 18 , wherein the voltage generator comprises:

a comparator configured to compare the regulated voltage signal with an offset voltage and output a comparison signal; and

a screener configured to generate a screening signal to pass a pulse of the comparison signal as the sensing signal, the pulse of the comparison signal corresponding to one of valley points detected while the drain voltage resonates.

20. The power converter of claim 16 , wherein the control circuit comprises:

a PWM controller configured to generate a PWM control signal for controlling a pulse width of the control signal based on the compensated sensing signal and a switch turn-off control signal; and

a gate driver configured to generate the control signal based on the PWM control signal.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2019
From: KIM, JOOHOON; KIM, JINTAE; JANG, JIHOON
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050919/0824 →