IP Library Granted Patent US 11,169,227
Granted Patent B2
US 11,169,227 · App. 16/730,777 · Granted Nov 9, 2021

Dual free layer TMR magnetic field sensor

Inventors: Chih-Ching Hu (Pleasanton, CA); Yung-Hung Wang (San Jose, CA); Yuankai Zheng (Fremont, CA); Chen-jung Chien (Mountain View, CA); Ming Mao (Dublin, CA); Daniele Mauri (San Jose, CA); Ming Jiang (San Jose, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G01R33/098G01R17/105G01R33/093H01L43/02H01L43/08H01L43/10H01L43/12
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Quick Facts
Patent No.
US 11,169,227
App. No.
16/730,777
Granted
Nov 9, 2021
Kind
B2
Abstract

The present disclosure generally relates to a Wheatstone bridge that includes a plurality of resistors comprising dual free layer (DFL) TMR structures. The DFL TMR structures include one or more hard bias structures on the side of DLF. Additionally, one or more soft bias structures may also be present on a side of the DFL. Two resistors will have identical hard bias material while two other resistors will have hard bias material that is identical to each other, yet different when compared to the first two resistors. The hard bias materials will provide opposite magnetizations that will provide opposite bias fields that result in two different magnetoresistance responses for the DFL TMR.

Claims (31)

1. A tunnel magnetoresistive (TMR) sensor device, comprising:

a first resistor including a dual free layer (DFL) TMR structure having at least one first hard bias structure of a first hard bias material and at least one insulation layer disposed between the DFL TMR structure and the first hard bias structure; and

a second resistor including a DFL TMR structure having at least one second hard bias structure of a second hard bias material that is different from the first hard bias material and at least one insulation layer disposed between the DFL TMR structure and the second hard bias structure.

2. The TMR sensor device of claim 1 , wherein the at least one first hard bias structure for the first resistor comprises two first hard bias structures.

3. The TMR sensor device of claim 2 , wherein the at least one second hard bias structure for the second resistor comprises two second hard bias structures.

4. The TMR sensor device of claim 3 , wherein the DFL TMR structure of the first resistor includes one or more first soft bias structures.

5. The TMR sensor device of claim 4 , wherein the DFL TMR structure of the second resistor includes one or more second soft bias structures.

6. The TMR sensor device of claim 5 , wherein the one or more first soft bias structures includes two first soft bias structures.

7. The TMR sensor device of claim 6 , wherein the one or more second soft bias structures includes two second soft bias structures.

8. The TMR sensor device of claim 3 , wherein the first hard bias material and the second hard bias material comprise the same compound with different element ratios.

9. The TMR sensor device of claim 3 , wherein the first hard bias material and the second hard bias material comprise different compounds.

10. The TMR sensor device of claim 1 , wherein the DFL TMR structure includes a seed layer, a first free layer, a barrier layer, a second free layer, and a capping layer.

11. A TMR sensor device, comprising:

a plurality of resistors that each comprises a DFL TMR structure, one or more hard bias structures adjacent the DFL TMR structure, and one or more soft bias structures adjacent the DFL TMR structure and the one or more hard bias structures, wherein the one or more hard bias structures are different in at least two resistors of the plurality of resistors; and

an insulating layer disposed between the one or more hard bias structures and the DFL TMR.

12. The TMR sensor device of claim 11 , wherein the one or more soft bias structures includes a first soft bias layer, a spacer layer, a second soft bias layer, and a capping layer.

13. The TMR sensor device of claim 12 , further comprising a spacer layer disposed between the one or more soft bias structures and the DFL TMR.

14. The TMR sensor device of claim 11 , wherein the insulating layer is disposed between the one or more hard bias structures and the one or more soft bias structures.

15. The TMR sensor device of claim 14 , wherein the insulating layer is disposed between the one or more soft bias structures and the DFL TMR.

16. The TMR sensor device of claim 11 , wherein the DFL TMR is disposed on a bottom lead.

17. A TMR sensor device, comprising:

a plurality of resistors that each comprises a DFL TMR structure, one or more hard bias structures adjacent the DFL TMR structure, and one or more soft bias structures adjacent the DFL TMR structure and the one or more hard bias structures, wherein the one or more hard bias structures are different in at least two resistors of the plurality of resistors, wherein the DFL TMR is disposed on a bottom lead, and wherein the one or more soft bias structures and the one or more hard bias structures are spaced from the bottom lead by a dielectric material.

18. A method of making a TMR sensor device, comprising:

forming a bottom lead over a substrate;

forming a DFL TMR structure over the bottom lead for a first resistor and a second resistor;

forming at least one hard bias structure adjacent the DFL TMR structure for the first resistor;

forming at least one hard bias structure adjacent the DFL TMR structure for the second resistor;

applying a first magnetic field initialization to the first resistor and the second resistor; and

applying a second magnetic field initialization to the first resistor and the second resistor, wherein the second magnetic field is different from the first magnetic field.

19. The method of claim 18 , wherein the second magnetic field is less than the first magnetic field.

20. The TMR sensor device of claim 11 , wherein the DFL TMR structure includes a seed layer, a first free layer, a barrier layer, a second free layer, and a capping layer.

Assignments (5)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0699 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2020
From: HU, CHIH-CHING; WANG, YUNG-HUNG; ZHENG, YUANKAI; CHIEN, CHEN-JUNG; MAO, MING; MAURI, DANIELE; JIANG, MING
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 052140/0551 →
SECURITY INTEREST Recorded Feb 26, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052025/0088 →
Continuity (2)
Provisional Application 62892642 · Aug 28, 2019
Related Publication 20210063508A1 · Mar 4, 2021