Method of forming a semiconductor device and circuit

1. An output circuit comprising:

a voltage follower transistor configured to receive a first signal that is representative of an input voltage formed from a first voltage supply, the voltage follower transistor configured to form an output voltage from a second supply voltage that is less than the first voltage supply and to supply an output current at an output to a load;

a gain transistor configured to sink current from the output in response to an increase in the output voltage, the gain transistor having a control electrode; and

a reference circuit coupled to the control electrode of the gain transistor and configured to increase a first voltage supplied to the control electrode of the gain transistor in response to the increase in the output voltage, the reference circuit having a reference transistor that conducts a reference current.

2. The output circuit of claim 1 wherein the reference circuit is configured to decrease the first voltage in response to a decrease in the output voltage.

3. The output circuit of claim 1 wherein the voltage follower transistor has a drain coupled to receive the second supply voltage, a source coupled to source the output current, and a gate.

4. The output circuit of claim 1 wherein the reference transistor has a control electrode coupled to receive the first signal and conducted the reference current, wherein the reference current varies in response to variations of the output voltage.

5. The output circuit of claim 4 wherein the reference circuit varies the first voltage supplied to the control electrode of the gain transistor in response to changes in the reference current.

6. The output circuit of claim 5 wherein a gate of the voltage follower transistor is commonly coupled to a gate of the reference transistor and to receive the input voltage.

7. The output circuit of claim 6 wherein the voltage follower transistor has a source coupled to a source of the gain transistor and coupled to supply the output voltage.

8. The output circuit of claim 1 wherein the reference circuit forms a first current, the reference transistor configured to conduct a first portion of the first current as the reference current; and

the reference circuit including a first transistor that conducts a second portion of the reference current as a second current and changes the first voltage supplied to the control electrode of the gain transistor proportionally to changes in the second current.

9. The output circuit of claim 8 wherein the reference circuit includes a first current source coupled to the control electrode of the gain transistor wherein the first current source conducts the second current.

10. The output circuit of claim 9 wherein the reference circuit includes a second current source having a first terminal coupled to receive the first voltage supply and a second terminal coupled to supply the first current.

11. The output circuit of claim 1 further including a response circuit configured to limit the first voltage to a value no less than substantially a gate threshold voltage of the gain transistor.

12. The output circuit of claim 11 further including a response circuit having a first transistor with a source coupled to a source of the gain transistor, the first transistor having a gate coupled to a drain of the first transistor and to a source of a second transistor, the second transistor having a gate commonly coupled to a drain of the second transistor and to a gate of a third transistor and to a drain of the third transistor, the third transistor having a source coupled to the gate of the gain transistor.

13. The output circuit of claim 1 further including an accuracy circuit configured to limit a drain voltage of the voltage follower transistor to substantially a drain voltage of a reference transistor of the reference circuit.

14. The output circuit of claim 13 wherein the accuracy circuit includes a first accuracy transistor having a source commonly coupled to a drain of the voltage follower transistor and to receive the second supply voltage, the first accuracy transistor having a gate coupled to a drain of the first accuracy transistor, the accuracy circuit including a second accuracy transistor having a gate coupled to the gate of the first accuracy transistor, a source coupled to a drain of the reference transistor, and a drain coupled to conduct the reference current.

15. A method of forming a translator circuit comprising:

coupling a voltage follower transistor to receive a control signal from a first circuit that operates from a first operating voltage, the voltage follower transistor configured to form an output voltage from a second operating voltage that is less than the first operating voltage wherein the output voltage is representative of the control signal and is formed at an output and wherein the voltage follower transistor supplies an output current from the second operating voltage; and

configuring a reference circuit to receive the control signal and responsively form a reference current to control an output transistor to sink current from the output in response to a change in the control signal.

16. The method of claim 15 including forming the voltage follower transistor to decrease a value of the output current in response to the change in the control signal.

17. The method of claim 15 including configuring the reference circuit to form a reference current that is substantially proportional to the output current and control the output transistor according to the reference current.

18. A method of forming a semiconductor device comprising:

configuring an amplifier circuit of the semiconductor device to operate from a first operating voltage and form a first signal referenced to the first operating voltage;

configuring an output transistor of the semiconductor device to operate from a second operating voltage that is less than the first operating voltage, the output transistor configured to form an output voltage from the second operating voltage and to also form an output current through the output transistor wherein the output voltage is formed at an output and is representative of the first signal; and

configuring a reference circuit to form a reference current that is substantially proportional to the output current, the reference circuit configured to control a first transistor to sink current from the output in response to changes in the reference current.

19. The method of claim 18 wherein configuring the reference circuit includes coupling a reference transistor to form the reference current wherein a gate of the reference transistor is connected to a gate of the output transistor, wherein changes in the reference current changes a gate voltage of the first transistor.

20. The method of claim 15 including configuring the reference circuit to operate from a supply voltage that is greater than the second operating voltage.