Power allocation management for external storage
The present disclosure generally relates to power management for an external storage device. The external storage device includes a power allocation unit coupled to an array of memory devices. A single bridge is present to provide a connection to a host device. The memory devices have operational power states that utilize a first amount of power and non-operational power states that utilize a second amount of power that is less than the first amount of power. The power allocation unit changes the power state of the individual memory devices between operational and non-operational based upon need, but also ensures that the external storage device does not exceed the total power allocation. Thus, the power allocation unit may change a power state of one memory device from operational to non-operational in order to change the power state of another memory device from non-operational to operational.
1. A data storage device, comprising:
a plurality of memory devices;
a controller configured to:
determine a relevant memory device by utilizing a credit system configured to wake up memory devices based on historical access patterns of the memory devices;
execute a read or write command at a block of the relevant memory device; and
determine whether the read or write command has arrived at the block; and
a power allocation unit coupled to each memory device of the plurality of memory devices, wherein the power allocation unit is configured to:
place the plurality of memory devices into a non-operational power state;
determine whether the relevant memory device of the plurality of memory devices is in a proper operational power state;
determine that the data storage device has insufficient power available to power up the relevant memory device;
change a power state of another memory device of the plurality of memory devices to a power state utilizing less power in response to determining that the data storage device has insufficient power available to power up the relevant memory device;
change the power state of the relevant memory device to a different power state that utilizes more power;
determine a predetermined period of idle time to pass while the relevant memory device is in the power state that utilizes more power after the controller has determined that the read or write command has arrived, wherein determining the predetermined period of idle time is determined by a system parameter of a memory device of the plurality of memory devices; and
change the power state of the relevant memory device from the power state that utilizes more power to a non-operational power state after the predetermined period of idle time has passed.
2. The data storage device of claim 1 , wherein the power allocation unit is further configured to determine whether a memory device of the plurality of memory devices is idle in the operational power state.
3. The data storage device of claim 2 , wherein the power allocation unit is further configured to determine whether a memory device of the plurality of memory devices has exceeded an idle time limit threshold.
4. The data storage device of claim 1 , wherein the power allocation unit is further configured to change the power state of the relevant memory device to a different power state in response to determining that the relevant memory device is in the non-operational power state.
5. The data storage device of claim 1 , wherein the power allocation unit is further configured to place the plurality of memory devices into a non-operational power mode in response to a predetermined period of idle time having passed for the plurality of memory devices.
6. The data storage device of claim 1 , wherein the power allocation unit is further configured to change the power state of the relevant memory device to a different power state that utilizes an amount of power equal to the amount of power the data storage device requires to operate.
7. The data storage device of claim 1 , wherein the power allocation unit is further configured to change the power state of the relevant memory device to a different power state that utilizes an amount of power greater than the amount of power the data storage device requires to operate.
8. The data storage device of claim 1 , wherein the controller is further configured to record the location of data written to a memory device in a flash translation layer table.
9. The data storage device of claim 1 , wherein the power allocation unit is further configured to change the power state of the relevant memory device from a first non-operational power state to a second non-operational power state, wherein the second non-operational power state utilizes less power than the first non-operational power state.
10. A data storage device, comprising:
a plurality of memory devices;
a controller configured to:
determine a desired memory device by utilizing a credit system configured to wake up memory devices based on historical access patterns of the memory devices;
execute a read or write command at a block of the desired memory device; and
determine whether the read or write command has arrived at the block; and
a power allocation unit coupled to each memory device of the plurality of memory devices, wherein the power allocation unit is configured to:
determine whether a desired memory device is in a proper power state;
determine whether the data storage device has sufficient power available to change a power state of the desired memory device from a non-operational power state to an operational power state;
determine whether any memory devices of the plurality of memory devices is idle and in the operational power state;
determine that the data storage device has insufficient power available to power up the desired memory device;
change a power state of another memory device of the plurality of memory devices to a power state utilizing less power in response to determining that the data storage device has insufficient power available to power up the desired memory device;
move the desired memory device from the non-operational power state to an operational power state;
determine a predetermined period of idle time to pass while the desired memory device is in the operational power state after the controller has determined that the read or write command has arrived, wherein determining the predetermined period of idle time is determined by a system parameter of a memory device of the plurality of memory devices; and
change the power state of the desired memory device from the operational power state to the non-operational power state after the predetermined period of idle time has passed.
11. The data storage device of claim 10 , wherein the controller is further configured to:
receive read or write commands; and
move the read or write commands to a command queue in response to the power allocation unit determining that there are no memory devices of the plurality of memory devices that are idle in the operational power state.
12. The data storage device of claim 10 , wherein the controller is further configured to:
receive read or write commands; and
execute the read or write commands after the power allocation unit has moved the desired memory device from the non-operational state to the operational power state.
13. The data storage device of claim 10 , wherein the moving the desired memory device from the non-operational power state to the operational power state occurs after the power allocation unit determines that the data storage device has sufficient power available to power up the desired memory device.
14. The data storage device of claim 10 , wherein the power allocation unit is further configured to change a memory device that is idle and in the operational state to the non-operational power state.
15. The data storage device of claim 14 , wherein the power allocation unit is further configured to move the desired memory device from the non-operational power state to the power operational state after changing the memory device that is idle and in the operational state to the non-operational state.
16. A data storage device, comprising:
a plurality of memory devices;
means to allocate power amongst the plurality of memory devices;
means to move a first memory device of the plurality of memory devices from a non-operational power state to an operational power state;
means to move a second memory device from the operational power state to the non-operational power state;
means to determine that the data storage device has insufficient power available to power up a relevant memory device;
means to change a power state of another memory device of the plurality of memory devices to a power state utilizing less power in response to determining that the data storage device has insufficient power available to power up the relevant memory device;
means to determine the relevant memory device by utilizing a credit system configured to wake up memory devices based on historical access patterns of the memory devices;
means to execute a read or write command at a block of the relevant memory device;
means to determine whether the read or write command has arrived at the block;
means to determine a predetermined period of idle time to pass while the relevant memory device is in the operational power state after the read or write command has arrived, wherein the predetermined period of idle time is based on a system parameter of a memory device of the plurality of memory devices; and
means to change the power state of the relevant memory device from the operational power state to the non-operational power state after the predetermined period of idle time has passed.
17. The data storage device of claim 16 , further comprising means to move read or write commands to a command queue upon determining that the data storage device does not have sufficient power available to power up a relevant memory device and determining that there are no memory devices that are idle and in the operational power state.
18. The data storage device of claim 16 , further comprising means to determine whether a memory device of the plurality of memory devices is in a proper power state.
19. The data storage device of claim 16 , further comprising means to determine whether a memory device of the plurality of memory devices is idle and in the operational state.
20. The data storage device of claim 19 , further comprising means to determine whether the memory device of the plurality of memory devices that is idle and in the operational state has exceeded a predetermined idle threshold.