IP Library Granted Patent US 11,445,243
Granted Patent B2
US 11,445,243 · App. 16/869,835 · Granted Sep 13, 2022

Adaptive rate control adjustment for hardware encoder

Inventor: Jian Wang (Burnaby, CA)
Assignee: PLANTRONICS, INC.
H04N21/44004H04N21/23406H04N21/23805H04N21/4305
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Quick Facts
Patent No.
US 11,445,243
App. No.
16/869,835
Granted
Sep 13, 2022
Kind
B2
Abstract

Correcting encode bit rate errors developed by a hardware encoder with an outer software rate adjustment loop. The rate adjustment loop maintains a VBV (video buffering verifier) buffer model. When VBV buffer fullness is over a threshold, the rate adjustment loop drops frames. If below the threshold, periodically a rate adjustment analysis performed. If a number of frames above a threshold have been dropped, the hardware encoder bit rate is decreased. A leaky bucket is checked to determine in bits and out bits. If the number of in bits exceeds the number of out bits times a multiplier, the hardware encoder bit rate is decreased. If the number of in bits times a multiplier is less than the number of out bits, the hardware encoder bit rate is increased. Dropping frames on buffer condition provides shorter term correction and adjustment of the hardware encoder bit rate provides longer term correction.

Claims (79)

1. An encoded video transmitter comprising:

a video input;

an encoded video output;

a hardware video encoder coupled to the video input and to the encoded video output;

an outgoing video buffer coupled to the hardware video encoder and to the encoded video output and receiving frames from the hardware video encoder and providing frames to the encoded video output;

a processor coupled to the hardware video encoder, the video input and the outgoing video buffer; and

a non-transitory memory coupled to the processor and storing instructions to cause the processor to perform a method comprising the steps of:

receiving a video frame to be encoded;

determining a fullness level value of the outgoing video buffer;

causing encoding of the received video frame to be skipped when the buffer fullness level value is above a threshold; and

periodically performing video encoding rate operations and adjusting of an encoding bit rate of the hardware video encoder if appropriate.

2. The encoded video transmitter of claim 1 , wherein causing encoding of the received video frame to be skipped includes incrementing a counter of skipped frames, and

wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the value of the skipped frame counter is above a second threshold; and

decreasing the encoding bit rate of the hardware video encoder when the skipped frame counter value is above the second threshold.

3. The encoded video transmitter of claim 2 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

4. The encoded video transmitter of claim 3 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

5. The encoded video transmitter of claim 2 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

6. The encoded video transmitter of claim 1 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

7. The encoded video transmitter of claim 6 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

8. The encoded video transmitter of claim 1 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

9. A method of transmitting encoded video from an encoded video transmitter using a hardware video encoder, the method comprising:

receiving a video frame to be encoded;

determining a fullness level value of an outgoing video buffer;

causing encoding of the received video frame to be skipped when the buffer fullness level value is above a threshold; and

periodically performing video encoding rate operations and adjusting of an encoding bit rate of the hardware video encoder if appropriate.

10. The method of claim 9 , wherein causing encoding of the received video frame to be skipped includes incrementing a counter of skipped frames, and

wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the value of the skipped frame counter is above a second threshold; and

decreasing the encoding bit rate of the hardware video encoder when the skipped frame counter value is above the second threshold.

11. The method of claim 10 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor;

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor;

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

12. The method of claim 9 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

13. The method of claim 12 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

14. The method of claim 9 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

15. A non-transitory memory coupled to a processor and storing instructions to cause the processor to perform a method comprising the steps of:

receiving a video frame to be encoded;

determining a fullness level value of an outgoing video buffer;

causing encoding of the received video frame to be skipped when the buffer fullness level value is above a threshold; and

periodically performing video encoding rate operations and adjusting of an encoding bit rate of a hardware video encoder if appropriate.

16. The non-transitory memory of claim 15 , wherein causing encoding of the received video frame to be skipped includes incrementing a counter of skipped frames, and

wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the value of the skipped frame counter is above a second threshold; and

decreasing the encoding bit rate of the hardware video encoder when the skipped frame counter value is above the second threshold.

17. The non-transitory memory of claim 16 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor;

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor;

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

18. The non-transitory memory of claim 15 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer; and

increasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer multiplied by a low rate factor are less than the bits flowing out of the outgoing video buffer.

19. The non-transitory memory of claim 18 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

20. The non-transitory memory of claim 15 , wherein performing video encoding rate operations and adjusting of the encoding bit rate of the hardware video encoder includes:

determining if the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor; and

decreasing the encoding bit rate of the hardware video encoder when the bits flowing into the outgoing video buffer are greater than the bits flowing out of the outgoing video buffer multiplied by a high rate factor.

Assignments (4)
NUNC PRO TUNC ASSIGNMENT Recorded Nov 13, 2023
From: PLANTRONICS, INC.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 065549/0065 →
RELEASE OF PATENT SECURITY INTERESTS Recorded Aug 30, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: PLANTRONICS, INC.; POLYCOM, INC.
Reel/Frame 061356/0366 →
SUPPLEMENTAL SECURITY AGREEMENT Recorded Oct 16, 2020
From: PLANTRONICS, INC.; POLYCOM, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 054090/0467 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2020
From: WANG, JIAN
To: PLANTRONICS, INC.
Reel/Frame 052609/0553 →
Continuity (2)
Provisional Application 62846501 · May 10, 2019
Related Publication 20200359087A1 · Nov 12, 2020