Semiconductor wafer and method of probe testing
Implementations of methods of making a semiconductor device may include: providing a partial semiconductor wafer. The method may also include providing a wafer holder including a tape portion with one or more openings through the tape portion. The method may include mounting the partial semiconductor wafer over the one or more openings in the tape portion of the wafer holder and providing an electrical connection to the partial semiconductor wafer through the one or more openings in the tape portion during probe test.
1. A method of probe testing a semiconductor wafer, comprising:
providing a partial semiconductor wafer;
providing a wafer holder including a support structure with a plurality of openings through the support structure;
mounting the partial semiconductor wafer over the plurality of openings in the support structure of the wafer holder; and
providing an electrical connection to the partial semiconductor wafer through the plurality of openings in the support structure during probe testing.
2. The method of claim 1 , wherein the partial semiconductor wafer comprises one or more singulated die.
3. The method of claim 1 , providing the partial semiconductor wafer comprises providing one or more stacked semiconductor die.
4. The method of claim 1 , further comprising forming one or more temporary electrically conductive traces over the support structure.
5. The method of claim 1 , further comprising forming the plurality of openings through the support structure after mounting the support structure to the wafer holder.
6. The method of claim 1 , further comprising forming the plurality of openings through the support structure prior to mounting the support structure to the wafer holder.
7. The method of claim 1 , wherein the plurality of openings comprise a plurality of openings formed as strips.
8. The method of claim 1 , wherein the plurality of openings comprise a plurality of openings formed as rings.
9. An apparatus for probe testing a semiconductor device, comprising:
a semiconductor wafer; and
a wafer holder including a support structure with one or more openings through the support structure;
wherein the semiconductor wafer is mounted over the one or more openings in the support structure of the wafer holder;
wherein the one or more openings in the support structure is configured to establish an electrical connection to the semiconductor wafer through the one or more openings in the support structure during probe testing; and
wherein the support structure is substantially non-stretchable.
10. The apparatus of claim 9 , wherein the semiconductor wafer comprises a partial semiconductor wafer.
11. The apparatus of claim 9 , wherein the semiconductor wafer comprises one or more stacked semiconductor die.
12. The apparatus of claim 9 , wherein the support structure of the wafer holder is electrically conductive.
13. The apparatus of claim 9 , wherein the support structure of the wafer holder is carbon coated with one of gold, copper, aluminum, or any combination thereof.
14. The apparatus of claim 9 , the wafer holder further comprising an adhesive on one or more edges of the wafer holder.
15. The apparatus of claim 9 , wherein the one or more openings in the support structure have a size smaller than a size of an individual die.
16. The apparatus of claim 9 , wherein the one or more openings comprise a plurality of openings in a form of a plurality of strips.
17. The apparatus of claim 9 , wherein the one or more openings comprise a plurality of openings in a form of a plurality of rings.
18. The apparatus of claim 9 , wherein the semiconductor wafer is removably mounted over the one or more openings in the support structure.
19. An apparatus for probe testing a semiconductor device, comprising:
a wafer holder including a support structure with one or more openings through the support structure;
wherein the wafer holder is configured to hold a semiconductor wafer over the one or more openings in the support structure of the wafer holder;
wherein the one or more openings in the support structure is configured to establish an electrical connection to the semiconductor wafer through the one or more openings in the support structure during probe testing; and
wherein the support structure is substantially non-stretchable.
20. The apparatus of claim 19 , further comprising a conductive trace formed on the support structure, wherein the conductive trace is configured to establish an electrical connection to the semiconductor wafer through the conductive trace during probe testing.