CARRIER CONFINEMENT IN LEDS BY VALENCE BAND ENGINEERING

1 . A micro-light emitting diode comprising:

a substrate;

an n-type semiconductor layer on the substrate;

a p-type semiconductor layer; and

an active region between the n-type semiconductor layer and the p-type semiconductor layer and configured to emit red light, the active region comprising:

a barrier layer characterized by a first lattice constant; and

a quantum well layer next to the barrier layer, the quantum well layer

characterized by a second lattice constant greater than the first lattice constant and by an in-plane compressive strain,

wherein the active region is characterized by a lateral linear dimension equal to or less than 10 μm.

2 . The micro-light emitting diode of claim 1 , wherein the substrate is characterized by a third lattice constant that matches the first lattice constant.

3 . The micro-light emitting diode of claim 1 , wherein:

the quantum well layer is characterized by an energy band structure including a heavy-hole band and a light-hole band in a valence band; and

a top of the heavy-hole band is higher than a top of the light-hole band.

4 . The micro-light emitting diode of claim 3 , wherein a difference between the top of the heavy-hole band and the top of the light-hole band is greater than 0.075 eV at room temperature.

5 . The micro-light emitting diode of claim 1 , wherein:

the substrate includes a GaAs substrate;

the barrier layer includes a (Al x Ga 1-x ) 0.5 In 0.5 P layer; and

the quantum well layer includes a Ga y In 1-y P or (AlxGai-x) y In 1-y P layer, wherein y is less than 0.5.

6 . The micro-light emitting diode of claim 1 , wherein a difference between the second lattice constant and the first lattice constant is greater than 1% of the first lattice constant.

7 . The micro-light emitting diode of claim 1 , wherein the red light is characterized by a wavelength greater than 600 nm.

8 . The micro-light emitting diode of claim 1 , wherein the active region includes a plurality of quantum well layers interleaved with a plurality of barrier layers, the plurality of quantum well layers including the quantum well layer.

9 . The micro-light emitting diode of claim 1 , further comprising a passivation layer on sidewalls of the active region.

10 . The micro-light emitting diode of claim 1 , wherein a thickness of the quantum well layer is less than a thickness of the barrier layer.

11 . A device comprising:

a substrate; and

an array of micro-light emitting diodes on the substrate, each micro-light emitting diode of the array of micro-light emitting diode comprising a mesa structure that comprises:

an n-type semiconductor layer;

a p-type semiconductor layer; and

an active region between the n-type semiconductor layer and the p-type semiconductor layer and configured to emit red light, the active region comprising:

a barrier layer characterized by a first lattice constant; and

a quantum well layer next to the barrier layer, the quantum well layer characterized by a second lattice constant greater than the first lattice constant and by an in-plane compressive strain,

wherein the active region is characterized by a lateral linear dimension equal to or less than 10 μm.

12 . The device of claim 11 , wherein the substrate is characterized by a third lattice constant that matches the first lattice constant.

13 . The device of claim 11 , wherein:

the quantum well layer is characterized by an energy band structure including a heavy-hole band and a light-hole band in a valence band; and

a top of the heavy-hole band is higher than a top of the light-hole band.

14 . The device of claim 13 , wherein a difference between the top of the heavy-hole band and the top of the light-hole band is greater than 0.075 eV at room temperature.

15 . The device of claim 11 , wherein:

the substrate includes a GaAs substrate;

the barrier layer includes a (Al x Ga 1-x ) 0.5 In 0.5 P layer; and

the quantum well layer includes a Ga y In 1-y P or (Al x Ga 1-x ) y In 1-y P layer, wherein y is less than 0.5.

16 . The device of claim 11 , wherein a difference between the second lattice constant and the first lattice constant is greater than 1% of the first lattice constant.

17 . The device of claim 11 , wherein the mesa structure is characterized by a vertical, conical, parabolic, inward-tilted, or outward-tilted shape.

18 . A method comprising:

growing an n-type semiconductor layer on a substrate;

alternately growing a plurality of barrier layers and a plurality of quantum well layers on the n-type semiconductor layer to form a multi-quantum-well structure, wherein the plurality of quantum well layers is characterized by a first lattice constant greater than 101% of a second lattice constant of the plurality of barrier layers and by an in-plane compressive strain;

growing a p-type semiconductor layer on the multi-quantum-well structure; and

selectively etching the p-type semiconductor layer, the multi-quantum-well structure, and the n-type semiconductor layer to form an array of mesa structures, wherein each mesa structure of the array of mesa structures is characterized by a lateral linear dimension equal to or less than 10 μm.

19 . The method of claim 18 , wherein:

the substrate includes a GaAs substrate;

the plurality of barrier layers includes a (Al x Ga 1-x ) 0.5 In 0.5 P layer; and

the plurality of quantum well layers includes a Ga y In 1-y P or (Al z Ga 1-z ) y yP layer, wherein y is less than 0.5.

20 . The method of claim 18 , wherein:

a quantum well layer of the plurality of quantum well layers is characterized by an energy band structure including a heavy-hole band and a light-hole band in a valence band;

a top of the heavy-hole band is higher than a top of the light-hole band; and

a difference between the top of the heavy-hole band and the top of the light-hole band is greater than 0.075 eV at room temperature.