Ratio-metric multi-sensing convertor

1. A capacitance-to-digital converter comprising:

switching circuitry coupled to a reference cell, a sensor cell, and a compensation cell, wherein the switching circuitry is controlled by a plurality of phase signals; and

a modulator front-end circuit coupled to the switching circuitry, wherein the modulator front-end circuit comprises a comparator, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream and the plurality of phase signals, wherein a duty cycle of the digital bitstream is representative of a ratio based on a first capacitance of the sensor cell, a second capacitance of the reference cell, and a third capacitance of the compensation cell.

2. The capacitance-to-digital converter of claim 1 , wherein the sensor cell comprises a sensor electrode, wherein the modulator front-end circuit further comprises a sequencer to generate a first phase signal, a second phase signal, a third phase signal, and a fourth phase signal of the plurality of phase signals, wherein the capacitance-to-digital converter is configured to:

apply a supply voltage to charge the sensor electrode to a first voltage level in a first phase corresponding to the first phase signal;

couple the sensor electrode to the first modulation capacitor to charge the first modulation capacitor in a second phase corresponding to the second phase signal;

couple the sensor electrode to a ground potential to ground the sensor electrode in a third phase corresponding to the third phase signal; and

couple the sensor electrode to the second modulation capacitor to discharge the second modulation capacitor in a fourth phase corresponding to the fourth phase signal.

3. The capacitance-to-digital converter of claim 2 , wherein

the reference cell comprises a reference electrode, wherein the capacitance-to-digital converter is further to:

in the first phase, apply the supply voltage to charge the reference electrode to the first voltage level;

in the second phase, couple the reference electrode to the second modulation capacitor to charge the second modulation capacitor;

in the third phase, couple the reference electrode to the ground potential to ground the reference electrode; and

in the fourth phase, couple the reference electrode to the first modulation capacitor to discharge the first modulation capacitor.

4. The capacitance-to-digital converter of claim 2 , wherein the reference cell comprises a reference electrode, wherein the second capacitance is a self-capacitance.

5. The capacitance-to-digital converter of claim 2 , wherein the reference cell comprises a first electrode and a second electrode, wherein the second capacitance is a mutual capacitance.

6. The capacitance-to-digital converter of claim 2 , wherein the compensation cell comprises a compensation electrode, and wherein the capacitance-to-digital converter is further to:

in the first phase, apply the supply voltage to charge the compensation electrode to the first voltage level;

in the second phase, couple the compensation electrode to the second modulation capacitor to charge the second modulation capacitor;

in the third phase, couple the compensation electrode to the ground potential to ground the compensation electrode; and

in the fourth phase, couple the compensation electrode to the first modulation capacitor to discharge the first modulation capacitor.

7. The capacitance-to-digital converter of claim 1 , wherein the compensation cell comprises a compensation electrode, wherein the modulator front-end circuit further comprises a sequencer to generate a first phase signal, a second phase signal, a third phase signal, and a fourth phase signal of the plurality of phase signals, wherein the capacitance-to-digital converter is configured to:

apply a supply voltage to charge the compensation electrode to a first voltage level in a first phase corresponding to the first phase signal;

couple the compensation electrode to the first modulation capacitor to charge the first modulation capacitor in a second phase corresponding to the second phase signal;

couple the compensation electrode to a ground potential to ground the compensation electrode in a third phase corresponding to the third phase signal; and

couple the compensation electrode to the second modulation capacitor to discharge the second modulation capacitor in a fourth phase corresponding to the fourth phase signal.

8. The capacitance-to-digital converter of claim 1 , wherein the duty cycle of the digital bitstream is the ratio between the second capacitance and a difference between the first capacitance and the third capacitance.

9. The capacitance-to-digital converter of claim 1 , wherein the sensor cell comprises a sensor electrode and the first capacitance of the sensor cell is a self-capacitance.

10. A method comprising:

in a first phase, applying a first phase signal to switching circuitry coupled between a supply voltage, a sensor electrode of a sensor cell, and a compensation electrode of a compensation cell to charge the sensor electrode and the compensation electrode to a first voltage level;

in a second phase, applying a second phase signal to the switching circuitry to couple the sensor electrode and the compensation electrode to a first modulation capacitor to charge the first modulation capacitor, the first modulation capacitor being coupled to a first input of a comparator of modulator front-end circuit;

in a third phase, applying a third phase signal to the switching circuitry to couple the sensor electrode and the compensation electrode to a ground potential to ground the sensor electrode;

in a fourth phase, applying a fourth phase signal to the switching circuitry to couple the sensor electrode and the compensation electrode to a second modulation capacitor to discharge the second modulation capacitor, the second modulation capacitor being coupled to a second input of the comparator; and

providing, by the modulator front-end circuit, a digital bitstream, and wherein a duty cycle of the digital bitstream is representative of a ratio based on a first capacitance of the sensor cell, a second capacitance of a reference cell, and a third capacitance of the compensation cell.

11. The method of claim 10 , further comprising:

in the first phase, applying the first phase signal to the switching circuitry to charge a reference electrode of the reference cell to the first voltage level;

in the second phase, applying the second phase signal to the switching circuitry to couple the reference electrode to the second modulation capacitor to charge the second modulation capacitor;

in the third phase, applying the third phase signal to the switching circuitry to couple the reference electrode to the ground potential to ground the reference electrode; and

in the fourth phase, applying the fourth phase signal to the switching circuitry to couple the reference electrode to the first modulation capacitor to discharge the first modulation capacitor.

12. The method of claim 11 , wherein the reference cell comprises the reference electrode, wherein the second capacitance is a self-capacitance.

13. The method of claim 11 , wherein the reference cell further comprises the reference electrode and a second reference electrode, wherein the second capacitance is a mutual capacitance.

14. The method of claim 10 , wherein the duty cycle of the digital bitstream is the ratio between the second capacitance and a difference between the first capacitance and the third capacitance.

15. A system comprising:

a reference cell;

a sensor cell;

a compensation cell; and

a capacitance-to-digital converter comprising:

switching circuitry coupled to the reference cell, the sensor cell, and the compensation cell, wherein the switching circuitry is controlled by a plurality of phase signals; and

a modulator front-end circuit coupled to the switching circuitry, wherein the modulator front-end circuit comprises a comparator, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream and the plurality of phase signals, wherein a duty cycle of the digital bitstream is representative of a ratio based on a first capacitance of the sensor cell, a second capacitance of the reference cell, and a third capacitance of the compensation cell.

16. The system of claim 15 , wherein the reference cell comprises a reference electrode, wherein the second capacitance is a self-capacitance.

17. The system of claim 15 , wherein the reference cell comprises a first electrode and a second electrode, wherein the second capacitance is a mutual capacitance.

18. The system of claim 15 , wherein the duty cycle of the digital bitstream is the ratio between the second capacitance and a difference between the first capacitance and the third capacitance.

19. The system of claim 15 , wherein the sensor cell comprises a sensor electrode and the first capacitance of the sensor cell is a self-capacitance.

20. The system of claim 15 , wherein the compensation cell comprises a compensation electrode, wherein the modulator front-end circuit further comprises a sequencer to generate a first phase signal, a second phase signal, a third phase signal, and a fourth phase signal of the plurality of phase signals, wherein the capacitance-to-digital converter is configured to:

apply a supply voltage to charge the compensation electrode to a first voltage level in a first phase corresponding to the first phase signal;

couple the compensation electrode to the first modulation capacitor to charge the first modulation capacitor in a second phase corresponding to the second phase signal;

couple the compensation electrode to a ground potential to ground the compensation electrode in a third phase corresponding to the third phase signal; and

couple the compensation electrode to the second modulation capacitor to discharge the second modulation capacitor in a fourth phase corresponding to the fourth phase signal.