IP Library Granted Patent US 12,326,467
Granted Patent B2
US 12,326,467 · App. 18/417,318 · Granted Jun 10, 2025

Inductive sensing methods, devices and systems

Inventors: Andriy Maharyta (Lviv, UA); Mykhaylo Krekhovetskyy (Lviv, UA)
Assignee: Cypress Semiconductor Corporation
G01R27/2611G01D5/22H03K17/952
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Quick Facts
Patent No.
US 12,326,467
App. No.
18/417,318
Granted
Jun 10, 2025
Kind
B2
Abstract

A method can include in a first phase of a sensing operation, controlling at least a first switch to energize a sensor inductance; in a second phase of the sensing operation that follows the first phase, controlling at least a second switch to couple the sensor inductance to a first modulator capacitance to induce a first fly-back current from the sensor inductance, the first fly-back current generating a first modulator voltage at the first modulator capacitance, and in response to the first modulator voltage, controlling at least a third switch to generate a balance current that flows in an opposite direction to the fly-back current at the first modulator node. The first and second phases can be repeated to generate a first modulator voltage at the first modulator capacitance. the modulator voltage can be converted into a digital value representing the sensor inductance. Related devices and systems are also disclosed.

Claims (46)

1. A method comprising:

coupling a sense current to a modulator node, the sense current formed by an inductive sensor cell and a first switching matrix;

coupling a balance current to the modulator node;

generating, with a comparator coupled to the modulator voltage, a bitstream, the modulator voltage formed by a modulator capacitance, the sense current, and the balance current.

2. The method of claim 1 further comprising:

coupling a compensation current to the modulator node, the compensation current formed by a compensation capacitance cell and a third switching matrix.

3. The method of claim 1 , further comprising:

converting the bitstream to a digital value, the digital value corresponding to an inductance of the inductive sensor cell.

4. The method of claim 1 , wherein the first sense current is formed by:

in a first phase, coupling a first node of the inductive sensor cell to a first voltage potential and a second node of the inductive sensor cell to a second voltage potential;

in a second phase, coupling the first node of the inductive sensor cell to the second voltage potential and the second node of the inductive sensor cell to the first voltage potential;

in a third phase, coupling the first node of the inductive sensor cell to the second voltage potential and the second node of the inductive sensor cell to the modulator node; and

in a fourth phase, coupling the first node and second nodes of the inductive sensor cell to the second voltage potential.

5. The method of claim 4 , wherein the first voltage potential is a supply voltage and the second voltage potential is ground.

6. The method of claim 4 , wherein the first voltage potential is ground and the second voltage potential is a supply voltage.

7. The method of claim 1 , wherein the balance current formed by a reference capacitance cell and a second switching matrix.

8. The method of claim 1 , wherein the balance current formed by current digital to analog converter (IDAC).

9. A device comprising:

a comparator having a first input, a second input, and an output;

a first modulation node coupled to the first input of the comparator;

a inductive sensor cell coupled to at least the first modulation node, the inductive sensor cell providing a sense current to the at least first modulation node;

a reference cell coupled to the at least first modulation node, the reference cell providing a balance current to the at least first modulation node; and

a modulation capacitor coupled to the first input of the comparator, wherein the output of the comparator is converted into a bitstream by a circuit, the bitstream corresponding to an inductance of the inductive sensor cell.

10. The device of claim 9 , further comprising a compensation cell coupled to the at least first modulation node, the compensation cell comprising a compensation capacitor.

11. The device of claim 9 , further comprising a digital section, the digital section for converting the bitstream to a digital value.

12. The device of claim 9 , wherein the inductive sensor cell is coupled to a switch matrix, the switch matrix for:

in a first phase, coupling a first node of the inductive sensor cell to a first voltage potential and a second node of the inductive sensor cell to a second voltage potential;

in a second phase, coupling the first node of the inductive sensor cell to the second voltage potential and the second node of the inductive sensor cell to the first voltage potential;

in a third phase, coupling the first node of the inductive sensor cell to the second voltage potential and the second node of the inductive sensor cell to the modulator node; and

in a fourth phase, coupling the first node and second nodes of the inductive sensor cell to the second voltage potential.

13. The device of claim 12 , wherein the first voltage potential is a supply voltage and the second voltage potential is ground.

14. The device of claim 12 , wherein the first voltage potential is ground and the second voltage potential is a supply voltage.

15. A system comprising:

a sensor cell having a sensor inductance; a reference cell; and

an integrated circuit comprising:

an analog front end for converting a sense current from the sensor cell and a switch matrix to a bitstream, and

a digital section for converting the bitstream to a digital value; wherein

the reference cell is providing a balancing current to a modulation circuit of the integrated circuit, the modulation circuit for receiving the sense current.

16. The system of claim 15 , further comprising a compensation cell comprising a capacitance, the compensation cell for providing a compensation current to the modulation circuit.

17. The system of claim 15 , wherein the sense current is provided by:

in a first phase, coupling a first node of the sensor cell to a first voltage potential and a second node of the sensor cell to a second voltage potential;

in a second phase, coupling the first node of the sensor cell to the second voltage potential and the second node of the sensor cell to the first voltage potential;

in a third phase, coupling the first node of the sensor cell to the second voltage potential and the second node of the sensor cell to the modulator node; and

in a fourth phase, coupling the first node and second nodes of the sensor cell to the second voltage potential.

18. The system of claim 15 , wherein the digital value is representative of an inductance of the sensor inductance of the sensor cell.

19. The system of claim 15 , wherein the reference cell comprises a capacitance, the capacitance disposed within the integrated circuit.

Assignments (2)
MERGER Recorded Nov 14, 2025
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 073571/0456 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2024
From: MAHARYTA, ANDRIY; KREKHOVETSKYY, MYKHAYLO
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 067300/0738 →
Continuity (3)
Continuation 18099105 · Jan 19, 2023
Continuation 17125808 · Dec 17, 2020
Related Publication 20240280620A1 · Aug 22, 2024
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