Patent Assignment
Reel/Frame 007253/0080
Assignment of Assignor's Interest
Recorded: 1994-12-19
Pages: 3
Assignor
HIDAKA, HIDETO
Executed: 1994-10-21
Assignee
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, 100, JAPAN
Covered Property
(1)
Semiconductor Memory Device Having a Hierarchical Bit Line Structure with Reduced Interference Noise
Patent:
5,610,871 →
Application:
08/341,145 →
Related Assignments
(1)
Other recorded transfers of the patent in this record — the chain of ownership.