Assignment of Assignor's Interest

Recorded: 1996-11-13 Pages: 2

Assignor

RAO, SATISH B.

Executed: 1996-11-07

Assignee

NEC RESEARCH INSTITUTE, INC.

4 INDEPENDENCE WAY, PRINCETON, NEW JERSEY, 08540

Covered Property (1)

Vlsi Circuit Layout Method Based on Spreading Functions and Simulated Annealing Heuristics to Minimize Area

Patent: 5,737,233 →

Application: 08/583,296 →

Related Assignments (1)

Other recorded transfers of the patent in this record — the chain of ownership.