Patent Assignment
Reel/Frame 009243/0806
Assignment of Assignor's Interest
Recorded: 1998-06-10
Pages: 2
Assignor
TAKAI, YASUHIRO
Executed: 1998-05-25
Assignee
NEC CORPORATION
7-1, SHIBA 5-CHOME, MINATO-KU, TOKYO, JAPAN
Covered Property
(1)
Clock Generating Circuit Having High Resolution of Delay Time Between External Clock Signal and Internal Clock Signal
Patent:
6,069,508 →
Application:
09/095,057 →
Related Assignments
(3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest
Feb 25, 2003
From: NEC CORPORATION
To: NEC ELECTRONICS CORPORATION
Reel/Frame 013751/0721 →
Change of Name
Oct 22, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025183/0574 →
Change of Address
Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →