IP Library Assignment 010425/0955
Patent Assignment
Reel/Frame 010425/0955

Security Agreement

Recorded: 1999-12-16 Pages: 21
Assignor
INTEGRAPH CORPORATION
Executed: 1999-11-30
Assignee
FOOTHILL CAPITAL CORPORATION
SUITE 1500, 11111 SANTA MONICA BLVD., LOS ANGELES, CALIFORNIA, 90025
Covered Properties (141)
Banded Vector to Raster Converter
Patent: 4,458,330 →
Application: 06/263,192 →
Video Display System for Displaying Symbol-Fragments in Different Orientations
Patent: 4,533,911 →
Application: 06/351,647 →
Memory Accessing Method
Patent: 4,464,715 →
Application: 06/351,651 →
Method and Apparatus for Vectorizing Documents and Symbol Recognition
Patent: 4,603,431 →
Application: 06/475,037 →
Video Circuit Including a Digital-to-Analog Converter in the Monitor Which Converts the Digital Data to Analog Currents Before Conversion to Analog Voltages
Patent: 4,910,685 →
Application: 06/530,607 →
Switching Circuit
Patent: 4,556,825 →
Application: 06/531,271 →
Graphic Vectorization System
Patent: 4,718,105 →
Application: 06/585,258 →
Digital Computer for Implementing Event Driven Simulation Algorithm
Patent: 4,751,637 →
Application: 06/594,533 →
Height Adjust Mechanism
Patent: 4,693,444 →
Application: 06/757,378 →
Two-Speed Clock Scheme for Co-Processors
Patent: 4,677,433 →
Application: 06/851,938 →
Cursor
Patent: 305,756 →
Application: 06/867,690 →
Quadword Boundary Cache System
Patent: 4,860,192 →
Application: 06/915,274 →
Method and Apparatus for Addressing a Cache Memory
Patent: 4,884,197 →
Application: 06/915,319 →
Instruction Execution Accelerator for a Pipelined Digital Machine with Virtual Memory
Patent: 4,811,215 →
Application: 06/941,085 →
Multiple Processor Accelerator for Logic Simulation
Patent: 4,873,656 →
Application: 07/067,633 →
Hardwired Pipeline Processor for Logic Simulation
Patent: 4,916,647 →
Application: 07/067,634 →
Digital Computer for Implementing Event Driven Simulation Algorithm
Patent: 4,814,983 →
Application: 07/118,295 →
Multiple Processor Accelerator for Logic Simulation
Patent: 4,872,125 →
Application: 07/142,721 →
Method for Determining an Intuitively Defined Spatial Relationship Among Physical Entites
Patent: 4,969,114 →
Application: 07/270,255 →
Apparatus for Maintaining Consistency of a Cache Memory with a Primary Memory
Patent: 4,933,835 →
Application: 07/300,174 →
Cache-Mmu System
Patent: 4,899,275 →
Application: 07/346,251 →
Circuit Simulation
Patent: 5,047,971 →
Application: 07/394,232 →
Cache Providing Caching /Non-Caching, Write-Through and Coptback Modes for Virtual Addresses and Including Bus Snooping to Maintain Coherency
Patent: 5,091,846 →
Application: 07/428,480 →
High Speed Redundant Rows and Columns for Semiconductor Memories
Patent: 5,274,593 →
Application: 07/590,243 →
Apparatus and Method for Stiffening a Circuit Board
Patent: 5,186,377 →
Application: 07/693,005 →
Apparatus for Computing a Sticky Bit for a Floating Point Arithmetic Unit
Patent: 5,432,727 →
Application: 07/725,417 →
Low Voltage Swing Output Mos Circuit for Driving an Ecl Circuit
Patent: 5,216,297 →
Application: 07/758,838 →
Memory Address Translation System Having Modifiable and Non- Modifiable Translation Mechanisms
Patent: 5,255,384 →
Application: 07/766,906 →
System for Dynamic Segmentation Analysis Using Conversion of Relational Data into Object-Oriented Data
Patent: 5,426,780 →
Application: 07/845,337 →
Method and Apparatus for Selecting and Measuring a Capacitance from a Plurality of Interconnected Capacitances
Patent: 5,212,454 →
Application: 07/855,981 →
A Distributed License Administration System Using a Local Policy Server to Communicate with a License Server and Control Execution of Computer Programs
Patent: 5,579,222 →
Application: 07/990,583 →
Decoder Scheme for Fully Associative Translation-Lookaside Buffer
Patent: 5,299,147 →
Application: 08/023,783 →
Pulsed Ground Circuit for Cam and Pal Memories
Patent: 5,446,685 →
Application: 08/023,904 →
3D Input System for Cad Systems
Patent: 5,461,709 →
Application: 08/024,239 →
Multi-Layered Integrated Circuit Package with Improved High Frequency Performance
Patent: 5,338,970 →
Application: 08/036,564 →
Apparatus for Writing Data to and Reading Data from a Multi-Port Ram in a Single Clock Cycle
Patent: 5,546,569 →
Application: 08/118,378 →
Method and Apparatus for Obtaining Data from a Data Circuit Utilizing Alternating Clock Pulses to Gate the Data to the Output
Patent: 5,479,646 →
Application: 08/118,539 →
Dynamic Cmos Logic Circuit with Precharge
Patent: 5,508,640 →
Application: 08/121,136 →
Method and Apparatus for Translating Virtual Addresses in a Data Processing System Having Multiple Instruction Pipelines and Separate Tlb's for Each Pipeline
Patent: 5,463,750 →
Application: 08/146,818 →
Apparatus for Obtaining Data from a Translation Memory Based Carry Signal from Adder
Patent: 5,502,829 →
Application: 08/148,219 →
Carry Chain Adder Using Regenerative Push-Pull Differential Logic
Patent: 5,487,025 →
Application: 08/152,561 →
Cmos Circuit for Implementing Boolean Functions
Patent: 5,455,528 →
Application: 08/152,764 →
A Method of Making a Multi-Layer to Package
Patent: 5,499,445 →
Application: 08/226,920 →
Method and Apparatus for Enabling Control of Task Execution
Patent: 5,542,088 →
Application: 08/235,595 →
Apparatus and Method for Implementing Interrupts in Pipelined Processors
Patent: 5,504,925 →
Application: 08/348,786 →
Ole for Design and Modeling
Patent: 5,682,468 →
Application: 08/378,251 →
Comparator Cell for Use in a Content Addressable Memory
Patent: 5,598,115 →
Application: 08/385,496 →
Software Scheduled Superscaler Computer Architecture
Patent: 5,560,028 →
Application: 08/422,753 →
Self-Clocking Pipeline Register
Patent: 5,534,796 →
Application: 08/427,076 →
Direct Access to Slave Processor by Unprotected Applications Using Context Saving and Restoring
Application: 08/431,820 →
Video Stream Data Mixing for 3D Graphics Systems
Patent: 5,831,637 →
Application: 08/431,821 →
System Usilizing Bios-Compatible High Performance Video Controller Being Default Controller at Boot-Up and Capable of Switching to Another Graphics Controller After Boot-Up
Patent: 5,799,204 →
Application: 08/432,106 →
System and Method for Controlling a Slave Processor
Patent: 5,878,216 →
Application: 08/432,272 →
Fifo Logical Addresses for Control and Error Recovery
Patent: 5,760,792 →
Application: 08/432,313 →
Vertex List Management System
Patent: 5,801,714 →
Application: 08/432,314 →
Method and Apparatus for Dynamically Interpreting Drawing Commands
Patent: 5,764,936 →
Application: 08/435,348 →
Object Relationship Management System
Patent: 5,692,184 →
Application: 08/437,942 →
Visible Line Processor
Patent: 5,835,095 →
Application: 08/438,048 →
System for Adding Attributes to an Object at Run Time in an Object Oriented Computer Environment
Patent: 5,778,227 →
Application: 08/509,847 →
Method and Apparatus for Parallel Access to Consecutive Tlb Entries
Patent: 5,924,125 →
Application: 08/520,973 →
Optimal Projection Design and Analysis
Patent: 5,798,923 →
Application: 08/544,812 →
Method for Object-Oriented Programming Using Dynamic Interfaces
Patent: 6,016,392 →
Application: 08/552,812 →
Cursor Positioning Method
Patent: 5,745,099 →
Application: 08/573,689 →
Method and Apparatus for Speculative Execution of Instructions
Patent: 6,185,668 →
Application: 08/576,876 →
Method and Apparatus for Controlling an Instruction Pipeline in a Data Processing System
Patent: 5,996,062 →
Application: 08/751,273 →
Instruction Cache Associative Crossbar Switch System
Patent: 5,794,003 →
Application: 08/754,337 →
Peer-To-Peer Parallel Processing Graphics Accelerator
Patent: 5,917,502 →
Application: 08/761,104 →
High-Availability Super Server
Patent: 6,374,329 →
Application: 08/802,827 →
Apparatus and Method for Signal Handling on Gtl-Type Buses
Patent: 5,852,372 →
Application: 08/803,157 →
Graphics Processing with Efficient Vector Drawing Efficient Stroking of Vectors with Arbitrary Endpoints
Patent: 6,529,196 →
Application: 08/825,259 →
High-Speed Video Frame Buffer Using Single Port Memory Chips
Patent: 5,864,512 →
Application: 08/832,708 →
Device, in Particular a Compact Disc, Comprising a Data Storage Medium and an Integrated Circuit
Patent: 5,862,117 →
Application: 08/835,647 →
Removable Circuit Board with Ducted Cooling
Patent: 5,822,188 →
Application: 08/835,694 →
Ole for Design and Modeling
Patent: 5,910,804 →
Application: 08/855,775 →
Apparatus for Improved Air Flow Though a Computer Chassis
Patent: 5,892,654 →
Application: 08/866,479 →
Hardware-Accelerated Photoreal Rendering
Patent: 6,690,369 →
Application: 08/904,715 →
Register File with Bypass Capability
Patent: 5,790,461 →
Application: 08/905,034 →
Direct Access to Slave Processing by Unprotected Application Using Context Saving and Restoration
Patent: 5,794,037 →
Application: 08/922,419 →
Graphics Processing with Efficient Clipping
Patent: 5,986,669 →
Application: 08/926,120 →
Object Relationship Management System
Patent: 6,052,691 →
Application: 08/937,147 →
Method and Apparatus for Unambiguous Selection of Graphic Objects, Keypoints and Relationships
Patent: 6,124,861 →
Application: 08/974,930 →
Apparatus and Method for Testing Computer Systems
Patent: 6,029,257 →
Application: 08/985,808 →
Multiple Display Synchronization Apparatus and Method
Patent: 6,046,709 →
Application: 09/007,615 →
Cursor Positioning Method
Patent: 6,014,127 →
Application: 09/026,955 →
Interactive Timeline Visualization
Patent: 6,392,651 →
Application: 09/054,629 →
Apparatus and Method for Applying Effects to Graphical Images
Patent: 6,204,851 →
Application: 09/054,964 →
Vliw Processor and Method Therefor
Patent: 6,892,293 →
Application: 09/057,861 →
Publication: US 2003/0191923
Method and Apparatus for Dynamically Interpreting Drawing Commands
Patent: 6,297,798 →
Application: 09/092,332 →
Apparatus and Method for Memory Error Detection
Patent: 6,158,025 →
Application: 09/123,339 →
High Speed Video Frame Buffer
Patent: 6,278,645 →
Application: 09/129,293 →
Bypassing a Nonpaged Pool Controller When Accessing a Remainder Portion of a Random Access Memory
Patent: 6,032,240 →
Application: 09/178,870 →
Method for Object-Oriented Programming Using Dynamic Interfaces
Patent: 6,237,044 →
Application: 09/204,329 →
Peer-To-Peer Parallel Processing Graphics Accelerator
Patent: 6,046,752 →
Application: 09/246,399 →
Apparatus and Method for Transmitting Documents Between a Server Computer and a Client Computer
Patent: 6,615,233 →
Application: 09/249,403 →
Buck Converter with Parallel Switches
Patent: 6,184,666 →
Application: 09/259,202 →
Computer Chassis with Retractable Access Door
Patent: 6,219,226 →
Application: 09/260,845 →
System for Reducing Aliasing on a Display Device
Patent: 7,616,200 →
Application: 09/329,557 →
Method and Apparatus for Transporting Information to a Graphic Accelerator Card
Patent: 6,313,845 →
Application: 09/345,678 →
System for Displaying a Television Signal on a Computer Monitor
Patent: 6,459,453 →
Application: 09/353,419 →
Wide Instruction Word Graphics Processor
Patent: 6,577,316 →
Application: 09/353,420 →
Publication: US 2002/0030685
System for Processing Vertices from a Graphics Request Stream
Patent: 6,188,410 →
Application: 09/353,432 →
Multi-Processor Graphics Accelerator
Patent: 6,476,816 →
Application: 09/353,495 →
Graphics Processor with Texture Memory Allocation System
Patent: 7,518,616 →
Application: 09/353,887 →
Data Sequencer with Mux Select Input for Converting Input Data Stream and to Specific Output Data Stream Using Two Exclusive-or Logic Gates and Counter
Patent: 6,480,913 →
Application: 09/353,894 →
Graphics Processing System with Multiple Strip Breakers
Patent: 6,518,971 →
Application: 09/353,912 →
Graphics Processing with Transcendental Function Generator
Patent: 6,181,355 →
Application: 09/354,083 →
Apparatus and Method of Directing Graphical Data to a Display Device
Patent: 6,157,393 →
Application: 09/354,462 →
Computer
Patent: 379,800 →
Application: 29/047,791 →
Computer Chassis Cover
Patent: 401,915 →
Application: 29/080,880 →
Computer Chassis
Patent: 408,373 →
Application: 29/084,114 →
Apparatus and Method for Memory Error Detection and Correction
Application: 60/053,892 →
Automatic Frame Accumulator
Application: 60/060,361 →
Apparatus and Method for Logging Information Relating to Function Calls to a Function Library
Application: 60/064,902 →
Apparatus and Method of Accessing Random Access Memory
Application: 60/065,218 →
Automatic Frame Accumulator
Application: 60/072,617 →
Apparatus and Method for Transmitting Documents Between a Server Computer and a Client Computer
Application: 60/074,920 →
Computer Expansion System with Improved Computer Chassis
Application: 60/077,239 →
Multiple Switch Buck Converter
Application: 60/077,256 →
Automatic File Indexer
Application: 60/086,309 →
System for Reducing Aliasing on a Display Device
Application: 60/089,030 →
Method and System for Transporting Information to a Graphic Accelerator Card
Application: 60/091,401 →
Graphics Processor with Texture Memory Allocation System
Application: 60/093,159 →
Wide Instruction Word Graphics Processor
Application: 60/093,165 →
Graphics Processing System with Multiple Strip Breakers
Application: 60/093,181 →
System for Displaying a Television Signal on a Computer Monitor
Application: 60/093,182 →
Graphics Processing for Efficient Polygon Handling
Application: 60/093,183 →
Graphics Processing with Transcendental Function Generator
Application: 60/093,185 →
Data Sequencing Apparatus and Method
Application: 60/093,196 →
System for Processing Verticles from a Graphics Request Stream
Application: 60/093,233 →
Multi-Processor Graphics Accelerator
Application: 60/093,247 →
Back End System for Multiprocessor Graphics Accelerator
Application: 60/107,232 →
Cad-Neutral Application Programming Interface
Application: 60/114,216 →
Expansion Card Securing Apparatus
Application: 60/121,663 →
Variable Stride Circle Rendering Appratus and Method
Application: 60/126,034 →
Graphics Processor for Stereoscopically Displaying a Grahical Image
Application: 60/127,789 →
Object Relationship Management System
Application: 60/131,970 →
Data Packer for Graphical Workstation
Application: 60/147,609 →
Graphics Workstation
Application: 60/147,668 →
Apparatus for Providing Videodriving Capability from Various Types of Dacs
Application: 60/147,699 →
Selectable Back End Unit
Application: 60/147,722 →
Phase Correction for Multiple Processors
Application: 60/147,723 →
Related Assignments (25)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignors Interest. Feb 24, 1982
From: STAMM, DAVID A.
To: DAISY SYSTEMS CORPORATION, A CORP OF CA.
Reel/Frame 003976/0779 →
Assignment of Assignors Interest. Mar 14, 1983
From: GROVER, DAVID N.; KLECA, EUGENE A.; LIPKIE, CURTIS A.
To: ANA TECH CORPORATION
Reel/Frame 004107/0332 →
Assignment of Assignors Interest. Mar 1, 1984
From: LIPKIE, CURTIS A.; KLECA, EUGENE A.
To: ANA TECH CORPORATION,
Reel/Frame 004238/0859 →
Assignment of Assignors Interest. Mar 28, 1984
From: CATLIN, GARY M.
To: DAISY SYSTEMS CORPORATION, A CORP. OF CA.
Reel/Frame 004259/0602 →
Assignment of Assignors Interest. Apr 30, 1984
From: THOMAS, CHRISTOPHER L.
To: INTERGRAPH CORPORATION, A CORP OF AL
Reel/Frame 004251/0127 →
Assignment of Assignors Interest. Apr 30, 1984
From: IMSAND, BRUCE E.; THOMAS, CHRISTOPHER L.
To: INTERGRAPH CORPORATION, A CORP. OF ALA.
Reel/Frame 004250/0568 →
Assignment of Assignors Interest. Jul 22, 1985
From: WILLIAMS, GLENN T.; THOMAS, MICHAEL D.
To: INTERGRAPH CORPORATION MADISON INDUSTRIAL PARK, A CORP OF AL
Reel/Frame 004434/0710 →
Assignment of Assignors Interest. May 28, 1986
From: PARKER, NICKY S.; PHILPO'T, G. LLOYD; VAN VALKENBURGH, CHARLES N.; BRAZELL, KENNETH M.
To: INTERGRAPH CORPORATION, A CORP. OF ALABAMA
Reel/Frame 004573/0657 →
Assignment of Assignors Interest. Oct 2, 1987
From: CATLIN, GARY M.
To: DAISY SYSTEMS CORPORATION, 700 MIDDLEFIELD RD., MOUNTAIN VIEW, CA. 94039-7006 A CORP. OF CA.
Reel/Frame 004793/0916 →
Assignment of Assignors Interest. Oct 2, 1987
From: CATLIN, GARY M.
To: DAISY SYSTEMS CORPORATION, 700 MIDDLEFIELD RD., MOUNTAIN VIEW, CA. 94039-7006 A CORP. OF CA.
Reel/Frame 004800/0256 →
Assignment of Assignors Interest. Jan 11, 1988
From: CATLIN, GARY M.
To: DAISY SYSTEMS, CORPORATION, A CORP. OF CA.
Reel/Frame 004821/0133 →
Assignment of Assignors Interest. Apr 15, 1988
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: INTERGRAPH CORPORATION, A DE CORP.
Reel/Frame 004855/0769 →
Assignment of Assignors Interest. Jan 24, 1989
From: HERRING, JOHN R.; OLIVER, DIANNE L.; COOKE, GARY W.
To: INTERGRAPH CORPORATION, A CORP. OF AL
Reel/Frame 005004/0513 →
Assignment of Assignors Interest. Feb 13, 1989
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: INTERGRAPH CORPORATION, A CORP. OF DE
Reel/Frame 005018/0566 →
Security Interest Jul 24, 1989
From: DAISY/CADNETIX INC.
To: HELLER FINANCIAL INC.
Reel/Frame 005167/0085 →
Change of Name Oct 4, 1989
From: DAISY SYSTEMS MERGER CORPORATION
To: DAISY SYSTEMS CORPORATION
Reel/Frame 005221/0527 →
Assignment of Assignors Interest. Oct 4, 1989
From: DAISEY/CADNETIX INC.
To: DAISY/CADNETIX INC., A CORP. OF CO
Reel/Frame 005159/0392 →
Merger Oct 4, 1989
From: DAISY SYSTEMS CORPORATION, A CA CORP.; DAISY SYSTEMS MERGER CORPORATION, A DE CORP.
To: DAISY SYSTEMS CORPORATION
Reel/Frame 005179/0818 →
Nunc Pro Tunc Assignment May 7, 1990
From: DAISY SYSTEMS CORPORATION
To: DAISY/CADNETIX INC., A CORP. OF COLORADO
Reel/Frame 005285/0247 →
Nunc Pro Tunc Assignment May 7, 1990
From: DAISY SYSTEMS CORPORATION
To: DAISY/CADNETIX INC., A CORP. OF COLORADO
Reel/Frame 005285/0193 →
Merger 03/0287 De May 7, 1990
From: DAISY SYSTEMS MERGER CORPORATION
To: DAISY SYSTEMS CORPORATION
Reel/Frame 005285/0234 →
Assignment of Assignors Interest. May 7, 1990
From: DAISY SYSTEMS CORPORATION
To: DAISY/CADNETIX INC.
Reel/Frame 005300/0652 →
Nunc Pro Tunc Assignment May 7, 1990
From: DAISY SYSTEMS CORPORATION
To: DAISY/CADNETIX INC., A CORP. OF COLORADO
Reel/Frame 005285/0250 →
Assignment of Assignors Interest. Sep 28, 1990
From: PROEBSTING, ROBERT J.
To: INTERGRAPH CORPORATION, A CORP OF DE
Reel/Frame 005473/0705 →
Assignment of Assignors Interest. Oct 18, 1990
From: ANA TECH CORPORATION
To: INTERGRAPH CORPORATION, A DE CORP.
Reel/Frame 005480/0236 →