Assignment of Assignor's Interest

Recorded: 2000-04-11 Pages: 2

Assignors

TAKIKAWA, KUMIKO

Executed: 2000-03-23

TANAKA, SATOSHI

Executed: 2000-03-23

HASHIMOTO, TAKASHI

Executed: 2000-03-27

OKABE, YOSHIYUKI

Executed: 2000-03-27

Assignee

HITACHI, LTD

CHIYODA-KU, 6, KANDA SURUGADAI 4-CHOME, TOKYO, JAPAN

Covered Property (1)

Pin Layout of Semiconductor Integrated Circuits Including Dul Band Amplifier and Receiving Mixer

Patent: 6,407,449 →

Application: 09/547,915 →

Related Assignments (2)

Other recorded transfers of the patent in this record — the chain of ownership.