Patent Assignment
Reel/Frame 011535/0219
Assignment of Assignor's Interest
Recorded: 2001-02-02
Received: 2001-02-28
Pages: 3
Assignor
CLEEVES, JAMES M.
Executed: 2001-02-02
Assignee
MATRIX SEMICONDUCTOR, INC.
3230 SCOTT BOULEVARD, SANTA CLARA, CA, 95054, UNITED STATES
Covered Properties
(2)
Memory array organization and related test method particularly well suited for integrated circuits having write-once memory arrays
Application:
09/775,956 →
Semiconductor Integrated Circuit Allowing Internal Voltage to Be Measured and Controlled Externally
Application:
09/774,719 →