IP Library › Assignment 011894/0066
Patent Assignment
Reel/Frame 011894/0066

Assignment of Assignor's Interest

Recorded: 2001-06-08 Pages: 3
Assignors
MURANAKA, MASAYA
Executed: 2001-04-12
KATO, HIDEAKI
Executed: 2001-04-12
ITO, YUTAKA
Executed: 2001-04-12
Assignees
HITACHI, LTD.
6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU, TOKYO, JAPAN
HITACHI, ULSI SYSTEMS CO., LTD.
22-1, JOSUIHONCHO 5-CHOME, KODAIRA-SHI, TOKYO 187-8522, JAPAN
Covered Property (1)
Method of Deciding Error Rate and Semiconductor Integrated Circuit Device
Patent: 6,735,726 →
Application: 09/875,961 →
Publication: US 2002/0004921
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 28, 2006
From: HITACHI, LTD.; HITACHI ULSI SYSTEMS CO., LTD.
To: ELPIDA MEMORY, INC.
Reel/Frame 018323/0001 →
Security Agreement Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →
Assignment of Assignor's Interest May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →