Patent Application
Utility
App. No. 09/875,961
· Confirmation No. 8318
METHOD OF DECIDING ERROR RATE AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-04-30 | RETMAIL |
Mail returned to USPTO as undelivered | 2 | View | |
| 2004-03-25 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2001-06-08 | TRNA |
Transmittal of New Application | 5 | View | |
| 2001-06-08 | SPEC |
Specification | 74 | View | |
| 2001-06-08 | CLM |
Claims | 6 | View | |
| 2001-06-08 | ABST |
Abstract | 2 | View | |
| 2001-06-08 | DRW |
Drawings-only black and white line drawings | 16 | View | |
| 2001-06-08 | OATH |
Oath or Declaration filed | 4 | View |
Inventors
Attorneys & Agents of Record
Classification
USPC
714/708
Prosecution
- Examiner
- TORRES, JOSEPH D
- Art Unit
- 2133
- Customer No.
- 181
- Docket No.
- XA-9485
- Confirmation No.
- 8318
Foreign Priority
2000-207717
·
2000-07-10
·
JAPAN
Publication
- Pub. No.
- US20020004921A1
- Pub. Date
- 2002-01-10
Patent Term Adjustment
0days
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2006-09-28
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2001-06-08
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Quick Facts
- App. No.
- 09/875,961
- Filed
- 2001-06-08
- Granted
- 2004-05-11
- Pub. No.
- US20020004921A1
- Examiner
- TORRES, JOSEPH D
- Art Unit
- 2133
- PTA
- 0 days
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