IP Library › Assignment 011932/0578
Patent Assignment
Reel/Frame 011932/0578

Assignment of Assignor's Interest

Recorded: 2001-06-20 Pages: 2
Assignor
LUKANC, JEFFREY
Executed: 2001-06-19
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
2975 STENDER WAY, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Test Bus Architecture for Embedded Ram and Method of Operating Same
Patent: 7,246,277 →
Application: 09/887,913 →
Publication: US 2003/0009712
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →