IP Library › Assignment 012091/0118
Patent Assignment
Reel/Frame 012091/0118

Assignment of Assignor's Interest

Recorded: 2001-08-20 Pages: 5
Assignors
HARDEE, KIM CARVER
Executed: 2000-12-18
HEIGHTLEY, JOHN D.
Executed: 2000-12-18
ALDRICH, LAWRENCE LEE
Executed: 2000-12-18
Assignees
UNITED MEMORIES, INC.
SUITE 109, 4815 LIST DRIVE, COLORADO SPRINGS, COLORADO, 80919
SONY CORPORATION
SHINAGAWA-KU, 6-7-35 KITA-SHINAGAWA, TOKYO 141-0001, JAPAN
Covered Property (1)
Architecture for high speed memory circuit having a relatively large number of internal data lines
Patent: 6,339,541 →
Application: 09/595,143 →
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 26, 2001
From: HARDEE, KIM CARVER; HEIGHTLEY, JOHN D.
To: UNITED MEMORIES, INC.; SONY CORPORATION
Reel/Frame 011653/0786 →
Assignment of Assignor's Interest Aug 8, 2013
From: UNITED MEMORIES INC.
To: SONY CORPORATION
Reel/Frame 030967/0231 →