IP Library Assignment 012485/0282
Patent Assignment
Reel/Frame 012485/0282

Assignment of Assignor's Interest

Recorded: 2002-01-07 Pages: 6
Assignors
GHARACHORLOO, KOUROSH
Executed: 2002-01-07
BARROSO, LUIZ A.
Executed: 2002-01-07
RAVISHANKAR, MOSUR K.
Executed: 2002-01-07
STETS, ROBERT J.
Executed: 2002-01-07
SCALES, DANIEL J.
Executed: 2002-01-07
Assignee
COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
20555 SH 249 - MC 110701, HOUSTON, TEXAS, 77070
Covered Property (1)
Scalable Multiprocessor System and Cache Coherence Method Implementing Store-Conditional Memory Transactions While an Associated Directory Entry Is Encoded as a Coarse Bit Vector
Patent: 6,748,498 →
Application: 10/042,053 →
Publication: US 2002/0124144
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Dec 11, 2006
From: COMPAQ INFORMATION TECHNOLOGIES GROUP, L.P.
To: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Reel/Frame 018606/0544 →
Assignment of Assignor's Interest Nov 9, 2015
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Reel/Frame 037079/0001 →