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App. No. 10/042,053 · Confirmation No. 5332

SCALABLE MULTIPROCESSOR SYSTEM AND CACHE COHERENCE METHOD IMPLEMENTING STORE-CONDITIONAL MEMORY TRANSACTIONS WHILE AN ASSOCIATED DIRECTORY ENTRY IS ENCODED AS A COARSE BIT VECTOR

Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362 View Patent ↗ View Publication ↗
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 Code Description Pages PDF
2004-02-02 IFEE Issue Fee Payment (PTO-85B) 2 View
2002-01-07 TRNA Transmittal of New Application 2 View
2002-01-07 SPEC Specification 62 View
2002-01-07 CLM Claims 12 View
2002-01-07 ABST Abstract 1 View
2002-01-07 DRW Drawings-only black and white line drawings 30 View
2002-01-07 OATH Oath or Declaration filed 5 View
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Quick Facts
App. No.
10/042,053
Filed
2002-01-07
Granted
2004-06-08
Pub. No.
US20020124144A1
Art Unit
2187
PTA
0 days