Patent Assignment
Reel/Frame 013001/0490
Assignment of Assignor's Interest
Recorded: 2002-06-11
Received: 2002-06-21
Pages: 3
Assignee
HEURISTIC PHYSICS LABORATORIES, INC.
2033 GATEWAY PLACE, SAN JOSE, CA, 95110, UNITED STATES
Covered Property
(1)
Method for Eliminating False Failures Saved by Redundant Paths During Circuit Area Analysis on an Integrated Circuit Layout
Application:
10/167,113 →