IP Library Assignment 013558/0203
Patent Assignment
Reel/Frame 013558/0203

Assignment of Assignor's Interest

Recorded: 2002-12-06 Pages: 3
Assignor
WONG, SAU CHING
Executed: 2002-12-06
Assignee
MULTI LEVEL MEMORY TECHNOLOGY
960 SARATOGA AVENUE, SUITE 115, SAN JOSE, CALIFORNIA, 95129
Covered Property (1)
Parallel Programming of Multiple-Bit-Per-Cell Memory Cells on a Continuous Word Line
Patent: 6,882,567 →
Application: 10/313,076 →
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 28, 2005
From: MULTI LEVEL MEMORY TECHNOLOGY (CALIFORNIA)
To: MULTI LEVEL MEMORY TECHNOLOGY (NEVADA)
Reel/Frame 016800/0640 →
Assignment of Assignor's Interest Aug 24, 2005
From: MULTI LEVEL MEMORY TECHNOLOGY
To: INTERNATIONAL DEVELOPMENT AND LICENSING
Reel/Frame 017176/0517 →
Assignment of Assignor's Interest Feb 3, 2006
From: INTERNATIONAL DEVELOPMENT AND LICENSING
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 017230/0319 →