Patent Assignment
Reel/Frame 017176/0517
Assignment of Assignor's Interest
Recorded: 2005-08-24
Pages: 4
Assignor
MULTI LEVEL MEMORY TECHNOLOGY
Executed: 2005-08-02
Assignee
INTERNATIONAL DEVELOPMENT AND LICENSING
13921 DAMON LANE, SARATOGA, CALIFORNIA, 95070
Covered Properties
(30)
Interlocked Bonding Pad Structures and Methods of Fabrication Therefor
Patent:
6,255,586 →
Application:
09/384,748 →
High Bandwidth Flash Memory That Selects Programming Parameters According to Measurements of Previous Programming Operations
Patent:
6,278,633 →
Application:
09/434,588 →
Data Management for Multi-Bit-Per-Cell Memories
Patent:
6,532,556 →
Application:
09/492,949 →
Read and write operations using constant row line voltage and variable column line load
Patent:
6,259,627 →
Application:
09/493,026 →
Multi-bit-per-cell non-volatile memory with maximized data capacity
Patent:
6,363,008 →
Application:
09/505,519 →
Sectorless Flash Memory Architecture
Patent:
6,662,263 →
Application:
09/518,608 →
Flash Memory with Dynamic Refresh
Patent:
6,396,744 →
Application:
09/558,477 →
Data Coding for Multi-Bit-Per-Cell Memories Having Variable Numbers of Bits Per Memory Cell
Patent:
6,466,476 →
Application:
09/766,272 →
High bandwidth multi-level flash memory using dummy memory accesses to improve precision when writing or reading a data stream
Patent:
6,330,185 →
Application:
09/768,922 →
Multi-Bit-Per-Cell Memory System with Numbers of Bits Per Cell Set by Testing of Memory Units
Patent:
6,558,967 →
Application:
09/775,415 →
Contactless Flash Memory with Buried Diffusion Bit/Virtual Ground Lines
Contactless Flash Memory with Shared Buried Diffusion Bit Line Architecture
Patent:
6,480,422 →
Application:
09/882,136 →
Flash Memory Array Partitioning Architectures
Bi-Directional Floating Gate Nonvolatile Memory
Bit Line Reference Circuits for Binary and Multiple-Bit-Per-Cell Memories
Parallel Programming of Multiple-Bit-Per-Cell Memory Cells on a Continuous Word Line
Patent:
6,882,567 →
Application:
10/313,076 →
Non-Volatile Memory Operations That Change a Mapping Between Physical and Logical Addresses When Restoring Data
Memory with Offset Bank Select Cells at Opposite Ends of Buried Diffusion Lines
Patent:
6,731,539 →
Application:
10/407,894 →
Efficient Redundancy System for Flash Memories with Uniformly Sized Blocks
Patent:
7,092,289 →
Application:
10/611,465 →
File Storage and Erasure in Flash Memory
Patent:
7,080,192 →
Application:
10/678,885 →
Programming of Multi-Level Memory Cells on a Continuous Word Line
Patent:
7,139,192 →
Application:
10/773,659 →
Contactless Bidirectional Nonvolatile Memory
Patent:
7,061,801 →
Application:
10/779,951 →
Accessing Individual Storage Nodes in a Bi-Directional Nonvolatile Memory Cell
Patent:
6,826,084 →
Application:
10/831,675 →
Refresh Operations That Change Address Mappings in a Non-Volatile Memory
Patent:
6,856,568 →
Application:
10/843,784 →
Erasing Storage Nodes in a Bi-Directional Nonvolatile Memory Cell
Patent:
6,914,820 →
Application:
10/956,906 →
Non-Uniform Programming Pulse Width for Writing of Multi-Bit-Per-Cell Memories
Patent:
7,054,193 →
Application:
10/982,298 →
Periodic Refresh Operations for Non-Volatile Multiple-Bit-Per-Cell Memory
Patent:
7,079,422 →
Application:
11/026,474 →
Parallel Programming of Multiple-Bit-Per-Cell Memory Cells by Controlling Program Pulsewidth and Programming Voltage
Patent:
7,426,138 →
Application:
11/135,747 →
Bit Line Reference Circuits for Binary and Multiple-Bit-Per-Cell Memories
Patent:
7,099,188 →
Application:
11/151,863 →
Fabricating Bi-Directional Nonvolatile Memory Cells
Patent:
7,221,591 →
Application:
11/153,020 →
Related Assignments
(5)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Aug 9, 2001
From: WONG, SAU CHING
To: MULTI LEVEL MEMORY TECHNOLOGY, INC.
Reel/Frame 012079/0866 →
Assignment of Assignor's Interest
Jul 28, 2005
From: MULTI LEVEL MEMORY TECHNOLOGY (CALIFORNIA)
To: MULTI LEVEL MEMORY TECHNOLOGY (NEVADA)
Reel/Frame 016800/0640 →
Assignment of Assignor's Interest
Jul 28, 2005
From: WONG, SAU CHING
To: MULTI LEVEL MEMORY TECHNOLOGY
Reel/Frame 016816/0970 →
Assignment of Assignor's Interest
Jul 28, 2005
From: WONG, SAU CHING
To: MULTI LEVEL MEMORY TECHNOLOGY
Reel/Frame 016816/0986 →
Assignment of Assignor's Interest
Feb 3, 2006
From: INTERNATIONAL DEVELOPMENT AND LICENSING
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 017230/0319 →